drm/i915: Remove Braswell GGTT update w/a

Testing with concurrent GGTT accesses no longer show the coherency
problems from yonder, commit 5bab6f60cb4d ("drm/i915: Serialise updates
to GGTT with access through GGTT on Braswell"). My presumption is that
the root cause was more likely fixed by commit 3b5724d702ef ("drm/i915:
Wait for writes through the GTT to land before reading back"), along
with the use of WC updates to the global gTT in commit 8448661d65f6
("drm/i915: Convert clflushed pagetables over to WC maps". Given
that the original symptoms can no longer be reproduced, time to remove
the workaround.

Testcase: igt/gem_concurrent_blit
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170220124718.14796-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index a5162cb..24fa262 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2085,32 +2085,6 @@ static void gen8_ggtt_insert_entries(struct i915_address_space *vm,
        ggtt->invalidate(vm->i915);
 }
 
-struct insert_entries {
-       struct i915_address_space *vm;
-       struct sg_table *st;
-       u64 start;
-       enum i915_cache_level level;
-       u32 flags;
-};
-
-static int gen8_ggtt_insert_entries__cb(void *_arg)
-{
-       struct insert_entries *arg = _arg;
-       gen8_ggtt_insert_entries(arg->vm, arg->st,
-                                arg->start, arg->level, arg->flags);
-       return 0;
-}
-
-static void gen8_ggtt_insert_entries__BKL(struct i915_address_space *vm,
-                                         struct sg_table *st,
-                                         u64 start,
-                                         enum i915_cache_level level,
-                                         u32 flags)
-{
-       struct insert_entries arg = { vm, st, start, level, flags };
-       stop_machine(gen8_ggtt_insert_entries__cb, &arg, NULL);
-}
-
 static void gen6_ggtt_insert_page(struct i915_address_space *vm,
                                  dma_addr_t addr,
                                  u64 offset,
@@ -2762,8 +2736,6 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
                ggtt->base.clear_range = gen8_ggtt_clear_range;
 
        ggtt->base.insert_entries = gen8_ggtt_insert_entries;
-       if (IS_CHERRYVIEW(dev_priv))
-               ggtt->base.insert_entries = gen8_ggtt_insert_entries__BKL;
 
        ggtt->invalidate = gen6_ggtt_invalidate;