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arm64: dts: hisi: add hns-dsaf cpld control for the hip07 SoC
authorHuazhong Tan <tanhuazhong@huawei.com>
Thu, 18 Jan 2018 12:31:37 +0000 (20:31 +0800)
committerWei Xu <xuwei5@hisilicon.com>
Fri, 2 Mar 2018 15:29:51 +0000 (15:29 +0000)
Add cpld-syscon node to support the cpld control for hns-dsaf
on the hip07 SoC.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
arch/arm64/boot/dts/hisilicon/hip07.dtsi

index 2c01a21..4bd6416 100644 (file)
                        reg = <0x0 0xc0000000 0x0 0x10000>;
                };
 
+               dsa_cpld: dsa_cpld@78000010 {
+                       compatible = "syscon";
+                       reg = <0x0 0x78000010 0x0 0x100>;
+                       reg-io-width = <2>;
+               };
+
                pcie_subctl: pcie_subctl@a0000000 {
                        compatible = "hisilicon,pcie-sas-subctrl", "syscon";
                        reg = <0x0 0xa0000000 0x0 0x10000>;
                        port@0 {
                                reg = <0>;
                                serdes-syscon = <&serdes_ctrl>;
+                               cpld-syscon = <&dsa_cpld 0x0>;
                                port-rst-offset = <0>;
                                port-mode-offset = <0>;
                                mc-mac-mask = [ff f0 00 00 00 00];
                        port@1 {
                                reg = <1>;
                                serdes-syscon= <&serdes_ctrl>;
+                               cpld-syscon = <&dsa_cpld 0x4>;
                                port-rst-offset = <1>;
                                port-mode-offset = <1>;
                                mc-mac-mask = [ff f0 00 00 00 00];