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drm/msm/dpu: drop enum dpu_mdp and MDP_TOP value
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 4 Jul 2023 02:21:22 +0000 (05:21 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 11 Jul 2023 15:20:52 +0000 (18:20 +0300)
Since there is always just a single MDP_TOP instance, drop the enum
dpu_mdp and corresponding index value.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/545357/
Link: https://lore.kernel.org/r/20230704022136.130522-6-dmitry.baryshkov@linaro.org
18 files changed:
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h

index e0d2ee4..30565b2 100644 (file)
@@ -27,7 +27,7 @@ static const struct dpu_ubwc_cfg msm8998_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg msm8998_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x458,
        .features = BIT(DPU_MDP_VSYNC_SEL),
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index 3dab2b9..2cfaf65 100644 (file)
@@ -27,7 +27,7 @@ static const struct dpu_ubwc_cfg sdm845_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sdm845_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x45c,
        .features = BIT(DPU_MDP_AUDIO_SELECT) | BIT(DPU_MDP_VSYNC_SEL),
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index ef611f2..675fc41 100644 (file)
@@ -27,7 +27,7 @@ static const struct dpu_ubwc_cfg sm8150_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sm8150_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x45c,
        .features = BIT(DPU_MDP_AUDIO_SELECT),
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index c52ea51..9c161e5 100644 (file)
@@ -27,7 +27,7 @@ static const struct dpu_ubwc_cfg sc8180x_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sc8180x_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x45c,
        .features = BIT(DPU_MDP_AUDIO_SELECT),
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index 7b4b3e0..262823f 100644 (file)
@@ -26,7 +26,7 @@ static const struct dpu_ubwc_cfg sm8250_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sm8250_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x494,
        .features = 0,
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index 0c59c88..5761774 100644 (file)
@@ -23,7 +23,7 @@ static const struct dpu_ubwc_cfg sc7180_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sc7180_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x494,
        .features = 0,
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index 917981a..d8ba015 100644 (file)
@@ -24,7 +24,7 @@ static const struct dpu_ubwc_cfg sm6115_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sm6115_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x494,
        .features = 0,
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index 0722616..ffcfaef 100644 (file)
@@ -26,7 +26,7 @@ static const struct dpu_ubwc_cfg sm6350_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sm6350_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x494,
        .features = 0,
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index 52c7c0f..e1ab63a 100644 (file)
@@ -21,7 +21,7 @@ static const struct dpu_ubwc_cfg qcm2290_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg qcm2290_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x494,
        .features = 0,
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index 29ab659..abb3d93 100644 (file)
@@ -25,7 +25,7 @@ static const struct dpu_ubwc_cfg sm6375_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sm6375_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x494,
        .features = 0,
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index 6392c31..0ba2391 100644 (file)
@@ -25,7 +25,7 @@ static const struct dpu_ubwc_cfg sm8350_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sm8350_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x494,
        .features = 0,
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index f975252..53dd9a1 100644 (file)
@@ -24,7 +24,7 @@ static const struct dpu_ubwc_cfg sc7280_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sc7280_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x2014,
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
        .clk_ctrls[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
index e45f9f0..74be2b1 100644 (file)
@@ -26,7 +26,7 @@ static const struct dpu_ubwc_cfg sc8280xp_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sc8280xp_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x494,
        .features = BIT(DPU_MDP_PERIPH_0_REMOVED),
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index 63ec133..04281af 100644 (file)
@@ -26,7 +26,7 @@ static const struct dpu_ubwc_cfg sm8450_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sm8450_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0x0, .len = 0x494,
        .features = BIT(DPU_MDP_PERIPH_0_REMOVED),
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
index e6ce10d..5d7b20e 100644 (file)
@@ -25,7 +25,7 @@ static const struct dpu_ubwc_cfg sm8550_ubwc_cfg = {
 };
 
 static const struct dpu_mdp_cfg sm8550_mdp = {
-       .name = "top_0", .id = MDP_TOP,
+       .name = "top_0",
        .base = 0, .len = 0x494,
        .features = BIT(DPU_MDP_PERIPH_0_REMOVED),
        .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x4330, .bit_off = 0 },
index 02a0f48..d85157a 100644 (file)
@@ -101,11 +101,6 @@ enum dpu_hw_blk_type {
        DPU_HW_BLK_MAX,
 };
 
-enum dpu_mdp {
-       MDP_TOP = 0x1,
-       MDP_MAX,
-};
-
 enum dpu_sspp {
        SSPP_NONE,
        SSPP_VIG0,
index 2bfc471..cff4876 100644 (file)
@@ -287,7 +287,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(const struct dpu_mdp_cfg *cfg,
        /*
         * Assign ops
         */
-       mdp->idx = cfg->id;
        mdp->caps = cfg;
        _setup_mdp_ops(&mdp->ops, mdp->caps->features);
 
index bf4235d..8b1463d 100644 (file)
@@ -137,7 +137,6 @@ struct dpu_hw_mdp {
        struct dpu_hw_blk_reg_map hw;
 
        /* top */
-       enum dpu_mdp idx;
        const struct dpu_mdp_cfg *caps;
 
        /* ops */