OSDN Git Service

igc: Remove PCIe Control register
authorSasha Neftin <sasha.neftin@intel.com>
Wed, 1 Apr 2020 08:43:20 +0000 (11:43 +0300)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Tue, 19 May 2020 21:23:54 +0000 (14:23 -0700)
GCR (PCIe Control) register not in use and should be removed
This patch clean up this register

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/igc/igc_regs.h

index 5a6110e..0f94285 100644 (file)
@@ -36,9 +36,6 @@
 #define IGC_FCRTH              0x02168  /* FC Receive Threshold High - RW */
 #define IGC_FCRTV              0x02460  /* FC Refresh Timer Value - RW */
 
-/* PCIe Register Description */
-#define IGC_GCR                        0x05B00  /* PCIe control- RW */
-
 /* Semaphore registers */
 #define IGC_SW_FW_SYNC         0x05B5C  /* SW-FW Synchronization - RW */
 #define IGC_SWSM               0x05B50  /* SW Semaphore */