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drm/radeon: fix sclk DS enablement
author
Alex Deucher
<alexander.deucher@amd.com>
Fri, 7 Nov 2014 18:06:57 +0000
(13:06 -0500)
committer
Alex Deucher
<alexander.deucher@amd.com>
Wed, 12 Nov 2014 16:56:41 +0000
(11:56 -0500)
Only enable it for levels 0 and 1.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/ci_dpm.c
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diff --git
a/drivers/gpu/drm/radeon/ci_dpm.c
b/drivers/gpu/drm/radeon/ci_dpm.c
index
9d04e68
..
324e31d
100644
(file)
--- a/
drivers/gpu/drm/radeon/ci_dpm.c
+++ b/
drivers/gpu/drm/radeon/ci_dpm.c
@@
-2872,6
+2872,8
@@
static int ci_populate_all_graphic_levels(struct radeon_device *rdev)
&pi->smc_state_table.GraphicsLevel[i]);
if (ret)
return ret;
+ if (i > 1)
+ pi->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0;
if (i == (dpm_table->sclk_table.count - 1))
pi->smc_state_table.GraphicsLevel[i].DisplayWatermark =
PPSMC_DISPLAY_WATERMARK_HIGH;