[DAG] Fix incorrect alignment of ext load.

Correctly use alignment size from loaded size not output value size.

Reviewers: jyknight, tstellarAMD, arsenm

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23356

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282177 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 78334fb..c3d5bee 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5057,7 +5057,7 @@ SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
   assert(Chain.getValueType() == MVT::Other &&
         "Invalid chain type");
   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
-    Alignment = getEVTAlignment(VT);
+    Alignment = getEVTAlignment(MemVT);
 
   MMOFlags |= MachineMemOperand::MOLoad;
   assert((MMOFlags & MachineMemOperand::MOStore) == 0);

diff --git a/test/CodeGen/AMDGPU/extload-align.ll b/test/CodeGen/AMDGPU/extload-align.ll
new file mode 100644 (file)
index 0000000..9d2eb74
--- /dev/null
+++ b/test/CodeGen/AMDGPU/extload-align.ll
@@ -0,0 +1,23 @@
+; RUN: llc -debug-only=misched -march=amdgcn -verify-machineinstrs %s -o - 2>&1| FileCheck -check-prefix=SI-NOHSA -check-prefix=FUNC -check-prefix=DEBUG %s
+; REQUIRES: asserts
+
+; Verify that the extload generated from %eval has the default
+; alignment size (2) corresponding to the underlying memory size (i16)
+; size and not 4 corresponding to the sign-extended size (i32).
+
+; DEBUG: {{^}}# Machine code for function extload_align:
+; DEBUG: mem:LD2[<unknown>]{{[^(]}}
+; DEBUG: {{^}}# End machine code for function extload_align.
+
+define void @extload_align(i32* %out, i32 %index) #0 {
+  %v0 = alloca [4 x i16]
+  %a1 = getelementptr inbounds [4 x i16], [4 x i16]* %v0, i32 0, i32 0
+  %a2 = getelementptr inbounds [4 x i16], [4 x i16]* %v0, i32 0, i32 1
+  store i16 0, i16* %a1
+  store i16 1, i16* %a2
+  %a = getelementptr inbounds [4 x i16], [4 x i16]* %v0, i32 0, i32 %index
+  %val = load i16, i16* %a
+  %eval = sext i16 %val to i32
+  store i32 %eval, i32* %out
+  ret void
+}
\ No newline at end of file