drm/amd/display: enable hostvm based on roimmu active for dcn2.1

Enabling hostvm when ROIMMU is not active seems to break GPUVM.
This fixes the issue by not enabling hostvm if ROIMMU is not
activated.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c
index 8e7e79f..bd247e5 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c
@@ -22,6 +22,7 @@
  * Authors: AMD
  *
  */
+#include <linux/delay.h>
 #include "dm_services.h"
 #include "dcn20/dcn20_hubbub.h"
 #include "dcn21_hubbub.h"
@@ -71,30 +72,39 @@ static uint32_t convert_and_clamp(
 void dcn21_dchvm_init(struct hubbub *hubbub)
 {
        struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
+       uint32_t riommu_active;
+       int i;
 
        //Init DCHVM block
        REG_UPDATE(DCHVM_CTRL0, HOSTVM_INIT_REQ, 1);
 
        //Poll until RIOMMU_ACTIVE = 1
-       //TODO: Figure out interval us and retry count
-       REG_WAIT(DCHVM_RIOMMU_STAT0, RIOMMU_ACTIVE, 1, 5, 100);
+       for (i = 0; i < 100; i++) {
+               REG_GET(DCHVM_RIOMMU_STAT0, RIOMMU_ACTIVE, &riommu_active);
 
-       //Reflect the power status of DCHUBBUB
-       REG_UPDATE(DCHVM_RIOMMU_CTRL0, HOSTVM_POWERSTATUS, 1);
+               if (riommu_active)
+                       break;
+               else
+                       udelay(5);
+       }
+
+       if (riommu_active) {
+               //Reflect the power status of DCHUBBUB
+               REG_UPDATE(DCHVM_RIOMMU_CTRL0, HOSTVM_POWERSTATUS, 1);
 
-       //Start rIOMMU prefetching
-       REG_UPDATE(DCHVM_RIOMMU_CTRL0, HOSTVM_PREFETCH_REQ, 1);
+               //Start rIOMMU prefetching
+               REG_UPDATE(DCHVM_RIOMMU_CTRL0, HOSTVM_PREFETCH_REQ, 1);
 
-       // Enable dynamic clock gating
-       REG_UPDATE_4(DCHVM_CLK_CTRL,
-                                       HVM_DISPCLK_R_GATE_DIS, 0,
-                                       HVM_DISPCLK_G_GATE_DIS, 0,
-                                       HVM_DCFCLK_R_GATE_DIS, 0,
-                                       HVM_DCFCLK_G_GATE_DIS, 0);
+               // Enable dynamic clock gating
+               REG_UPDATE_4(DCHVM_CLK_CTRL,
+                                               HVM_DISPCLK_R_GATE_DIS, 0,
+                                               HVM_DISPCLK_G_GATE_DIS, 0,
+                                               HVM_DCFCLK_R_GATE_DIS, 0,
+                                               HVM_DCFCLK_G_GATE_DIS, 0);
 
-       //Poll until HOSTVM_PREFETCH_DONE = 1
-       //TODO: Figure out interval us and retry count
-       REG_WAIT(DCHVM_RIOMMU_STAT0, HOSTVM_PREFETCH_DONE, 1, 5, 100);
+               //Poll until HOSTVM_PREFETCH_DONE = 1
+               REG_WAIT(DCHVM_RIOMMU_STAT0, HOSTVM_PREFETCH_DONE, 1, 5, 100);
+       }
 }
 
 int hubbub21_init_dchub(struct hubbub *hubbub,