drm/amd/display: Detect plane change when detect pipe change.

[Why]
If plane has changed, dcn20_detect_pipe_changes doesn't update dc_plane_state->update_flags, and the following dcn20_program_pipe can't reprogram hubp correctly.

[How]
Add a new flags bit "plane_changed" in pipe_ctx->update_flags.If old plane isn’t identical to new plane, this bit will be set and guide “dcn20_program_pipe” to programing HUBP correctly.

Signed-off-by: JinZe.Xu <JinZe.Xu@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index c8cfd3b..ee33487 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1251,6 +1251,11 @@ static void dcn20_detect_pipe_changes(struct pipe_ctx *old_pipe, struct pipe_ctx
                return;
        }
 
+       /* Detect plane change */
+       if (old_pipe->plane_state != new_pipe->plane_state) {
+               new_pipe->update_flags.bits.plane_changed = true;
+       }
+
        /* Detect top pipe only changes */
        if (!new_pipe->top_pipe && !new_pipe->prev_odm_pipe) {
                /* Detect odm changes */
@@ -1392,6 +1397,7 @@ static void dcn20_update_dchubp_dpp(
                        &pipe_ctx->ttu_regs);
 
        if (pipe_ctx->update_flags.bits.enable ||
+                       pipe_ctx->update_flags.bits.plane_changed ||
                        plane_state->update_flags.bits.bpp_change ||
                        plane_state->update_flags.bits.input_csc_change ||
                        plane_state->update_flags.bits.color_space_change ||
@@ -1414,6 +1420,7 @@ static void dcn20_update_dchubp_dpp(
        }
 
        if (pipe_ctx->update_flags.bits.mpcc
+                       || pipe_ctx->update_flags.bits.plane_changed
                        || plane_state->update_flags.bits.global_alpha_change
                        || plane_state->update_flags.bits.per_pixel_alpha_change) {
                // MPCC inst is equal to pipe index in practice
@@ -1515,6 +1522,7 @@ static void dcn20_update_dchubp_dpp(
        }
 
        if (pipe_ctx->update_flags.bits.enable ||
+                       pipe_ctx->update_flags.bits.plane_changed ||
                        pipe_ctx->update_flags.bits.opp_changed ||
                        plane_state->update_flags.bits.pixel_format_change ||
                        plane_state->update_flags.bits.horizontal_mirror_change ||
@@ -1539,7 +1547,9 @@ static void dcn20_update_dchubp_dpp(
                hubp->power_gated = false;
        }
 
-       if (pipe_ctx->update_flags.bits.enable || plane_state->update_flags.bits.addr_update)
+       if (pipe_ctx->update_flags.bits.enable ||
+               pipe_ctx->update_flags.bits.plane_changed ||
+               plane_state->update_flags.bits.addr_update)
                hws->funcs.update_plane_addr(dc, pipe_ctx);
 
 

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index 329395e..cc5f053 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -300,6 +300,7 @@ union pipe_update_flags {
                uint32_t gamut_remap : 1;
                uint32_t scaler : 1;
                uint32_t viewport : 1;
+               uint32_t plane_changed : 1;
        } bits;
        uint32_t raw;
 };