Simply checking for register class equality will break once additional
register classes are added (as is done for the RVC instruction set extension).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320036
91177308-0d34-0410-b5e6-
96231b3b80d8
if (I != MBB.end())
DL = I->getDebugLoc();
- if (RC == &RISCV::GPRRegClass)
+ if (RISCV::GPRRegClass.hasSubClassEq(RC))
BuildMI(MBB, I, DL, get(RISCV::SW))
.addReg(SrcReg, getKillRegState(IsKill))
.addFrameIndex(FI)
if (I != MBB.end())
DL = I->getDebugLoc();
- if (RC == &RISCV::GPRRegClass)
+ if (RISCV::GPRRegClass.hasSubClassEq(RC))
BuildMI(MBB, I, DL, get(RISCV::LW), DstReg).addFrameIndex(FI).addImm(0);
else
llvm_unreachable("Can't load this register from stack slot");