+2002-12-18 Chris Demetriou <cgd@broadcom.com>
+
+ * config/tc-mips.c (macro): In M_DROL, M_DROR, M_ROL, and M_ROR,
+ use hardware rotate ops as appropriate. In M_DROL_I, M_DROR_I,
+ M_ROL_I, and M_ROR_I, simplify code, clean up warnings, and
+ arrange not to issue warnings about use of AT when AT is not
+ actually used.
+
2002-12-17 Nick Clifton <nickc@redhat.com>
* as.c (std_longopts): Duplicate --keep-locals entry in order to
break;
case M_DROL:
+ if (CPU_HAS_DROR (mips_arch))
+ {
+ if (dreg == sreg)
+ {
+ tempreg = AT;
+ used_at = 1;
+ }
+ else
+ {
+ tempreg = dreg;
+ used_at = 0;
+ }
+ macro_build ((char *) NULL, &icnt, NULL, "dnegu",
+ "d,w", tempreg, treg);
+ macro_build ((char *) NULL, &icnt, NULL, "drorv",
+ "d,t,s", dreg, sreg, tempreg);
+ if (used_at)
+ break;
+ return;
+ }
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
"d,v,t", AT, 0, treg);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
break;
case M_ROL:
+ if (CPU_HAS_ROR (mips_arch))
+ {
+ if (dreg == sreg)
+ {
+ tempreg = AT;
+ used_at = 1;
+ }
+ else
+ {
+ tempreg = dreg;
+ used_at = 0;
+ }
+ macro_build ((char *) NULL, &icnt, NULL, "negu",
+ "d,w", tempreg, treg);
+ macro_build ((char *) NULL, &icnt, NULL, "rorv",
+ "d,t,s", dreg, sreg, tempreg);
+ if (used_at)
+ break;
+ return;
+ }
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu",
"d,v,t", AT, 0, treg);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srlv",
case M_DROL_I:
{
unsigned int rot;
+ char *l, *r;
if (imm_expr.X_op != O_constant)
- as_bad (_("rotate count too large"));
+ as_bad (_("Improper rotate count"));
rot = imm_expr.X_add_number & 0x3f;
if (CPU_HAS_DROR (mips_arch))
{
else
macro_build ((char *) NULL, &icnt, NULL, "dror",
"d,w,<", dreg, sreg, rot);
- break;
+ return;
}
if (rot == 0)
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrl",
- "d,w,<", dreg, sreg, 0);
- else
{
- char *l, *r;
-
- l = (rot < 0x20) ? "dsll" : "dsll32";
- r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32";
- rot &= 0x1f;
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
- "d,w,<", AT, sreg, rot);
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
- "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
- "d,v,t", dreg, dreg, AT);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrl",
+ "d,w,<", dreg, sreg, 0);
+ return;
}
+ l = (rot < 0x20) ? "dsll" : "dsll32";
+ r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32";
+ rot &= 0x1f;
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+ "d,w,<", AT, sreg, rot);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+ "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
}
break;
unsigned int rot;
if (imm_expr.X_op != O_constant)
- as_bad (_("rotate count too large"));
+ as_bad (_("Improper rotate count"));
rot = imm_expr.X_add_number & 0x1f;
if (CPU_HAS_ROR (mips_arch))
{
macro_build ((char *) NULL, &icnt, NULL, "ror",
"d,w,<", dreg, sreg, (32 - rot) & 0x1f);
- break;
+ return;
}
if (rot == 0)
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
- "d,w,<", dreg, sreg, 0);
- else
{
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
- "d,w,<", AT, sreg, rot);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
- "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
- "d,v,t", dreg, dreg, AT);
+ "d,w,<", dreg, sreg, 0);
+ return;
}
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+ "d,w,<", AT, sreg, rot);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+ "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
}
break;
case M_DROR:
+ if (CPU_HAS_DROR (mips_arch))
+ {
+ macro_build ((char *) NULL, &icnt, NULL, "drorv",
+ "d,t,s", dreg, sreg, treg);
+ return;
+ }
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
"d,v,t", AT, 0, treg);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
break;
case M_ROR:
+ if (CPU_HAS_ROR (mips_arch))
+ {
+ macro_build ((char *) NULL, &icnt, NULL, "rorv",
+ "d,t,s", dreg, sreg, treg);
+ return;
+ }
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu",
"d,v,t", AT, 0, treg);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sllv",
case M_DROR_I:
{
unsigned int rot;
+ char *l, *r;
if (imm_expr.X_op != O_constant)
- as_bad (_("rotate count too large"));
+ as_bad (_("Improper rotate count"));
rot = imm_expr.X_add_number & 0x3f;
+ if (CPU_HAS_DROR (mips_arch))
+ {
+ if (rot >= 32)
+ macro_build ((char *) NULL, &icnt, NULL, "dror32",
+ "d,w,<", dreg, sreg, rot - 32);
+ else
+ macro_build ((char *) NULL, &icnt, NULL, "dror",
+ "d,w,<", dreg, sreg, rot);
+ return;
+ }
if (rot == 0)
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrl",
- "d,w,<", dreg, sreg, 0);
- else
{
- char *l, *r;
-
- r = (rot < 0x20) ? "dsrl" : "dsrl32";
- l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32";
- rot &= 0x1f;
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
- "d,w,<", AT, sreg, rot);
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
- "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
- "d,v,t", dreg, dreg, AT);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrl",
+ "d,w,<", dreg, sreg, 0);
+ return;
}
+ r = (rot < 0x20) ? "dsrl" : "dsrl32";
+ l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32";
+ rot &= 0x1f;
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+ "d,w,<", AT, sreg, rot);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+ "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
}
break;
unsigned int rot;
if (imm_expr.X_op != O_constant)
- as_bad (_("rotate count too large"));
+ as_bad (_("Improper rotate count"));
rot = imm_expr.X_add_number & 0x1f;
+ if (CPU_HAS_ROR (mips_arch))
+ {
+ macro_build ((char *) NULL, &icnt, NULL, "ror",
+ "d,w,<", dreg, sreg, rot);
+ return;
+ }
if (rot == 0)
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
- "d,w,<", dreg, sreg, 0);
- else
{
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
- "d,w,<", AT, sreg, rot);
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
- "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
- "d,v,t", dreg, dreg, AT);
+ "d,w,<", dreg, sreg, 0);
+ return;
}
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+ "d,w,<", AT, sreg, rot);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+ "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
}
break;
+2002-12-18 Chris Demetriou <cgd@broadcom.com>
+
+ * gas/mips/rol.s: Add ".set noat" and some new instructions to test.
+ * gas/mips/rol64.s: Likewise.
+ * gas/mips/rol.l: New file.
+ * gas/mips/rol.d: Adjust to use rol.l and for rol.s changes.
+ * gas/mips/rol64.l: New file.
+ * gas/mips/rol64.d: Adjust to use rol64.l and for rol64.s changes.
+ * gas/mips/rol-hw.d: New file.
+ * gas/mips/rol-hw.l: New file.
+ * gas/mips/rol64-hw.d: New file.
+ * gas/mips/rol64-hw.l: New file.
+ * gas/mips/mips.exp: Run rol-hw and rol64-hw tests.
+
2002-12-12 Alexandre Oliva <aoliva@redhat.com>
* gas/mips/beq.d: Comment out branches to undefined symbols,
run_dump_test "mul"
}
run_dump_test "rol"
+ run_dump_test "rol-hw"
run_dump_test "rol64"
+ run_dump_test "rol64-hw"
if !$aout { run_dump_test "sb" }
run_dump_test "trunc"
if !$aout { run_dump_test "ulh" }
--- /dev/null
+#objdump: -dr --prefix-addresses -mmips:5400
+#as: -march=vr5400 -mtune=vr5400
+#name: MIPS hardware rol (vr5400)
+#source: rol.s
+#stderr: rol-hw.l
+
+# Test the rol and ror macros.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> negu at,a1
+0+0004 <[^>]*> rorv a0,a0,at
+0+0008 <[^>]*> negu a0,a2
+0+000c <[^>]*> rorv a0,a1,a0
+0+0010 <[^>]*> ror a0,a0,0x1f
+0+0014 <[^>]*> ror a0,a1,0x1f
+0+0018 <[^>]*> ror a0,a1,0x0
+0+001c <[^>]*> rorv a0,a0,a1
+0+0020 <[^>]*> rorv a0,a1,a2
+0+0024 <[^>]*> ror a0,a0,0x1
+0+0028 <[^>]*> ror a0,a1,0x1
+0+002c <[^>]*> ror a0,a1,0x0
+0+0030 <[^>]*> ror a0,a1,0x0
+0+0034 <[^>]*> ror a0,a1,0x1f
+0+0038 <[^>]*> ror a0,a1,0x1
+0+003c <[^>]*> ror a0,a1,0x0
+0+0040 <[^>]*> ror a0,a1,0x1
+0+0044 <[^>]*> ror a0,a1,0x1f
+ ...
--- /dev/null
+.*: Assembler messages:
+.*:7: Warning: Macro used \$at after "\.set noat"
#objdump: -dr --prefix-addresses -mmips:3000
#as: -march=r3000 -mtune=r3000
-#name: MIPS R3000 rol
+#name: MIPS macro rol (r3000)
+#stderr: rol.l
# Test the rol and ror macros.
0+006c <[^>]*> sll a0,a1,0x1f
0+0070 <[^>]*> or a0,a0,at
0+0074 <[^>]*> srl a0,a1,0x0
+0+0078 <[^>]*> srl a0,a1,0x0
+0+007c <[^>]*> sll at,a1,0x1
+0+0080 <[^>]*> srl a0,a1,0x1f
+0+0084 <[^>]*> or a0,a0,at
+0+0088 <[^>]*> sll at,a1,0x1f
+0+008c <[^>]*> srl a0,a1,0x1
+0+0090 <[^>]*> or a0,a0,at
+0+0094 <[^>]*> srl a0,a1,0x0
+0+0098 <[^>]*> srl at,a1,0x1
+0+009c <[^>]*> sll a0,a1,0x1f
+0+00a0 <[^>]*> or a0,a0,at
+0+00a4 <[^>]*> srl at,a1,0x1f
+0+00a8 <[^>]*> sll a0,a1,0x1
+0+00ac <[^>]*> or a0,a0,at
...
--- /dev/null
+.*: Assembler messages:
+.*:7: Warning: Macro used \$at after "\.set noat"
+.*:8: Warning: Macro used \$at after "\.set noat"
+.*:9: Warning: Macro used \$at after "\.set noat"
+.*:10: Warning: Macro used \$at after "\.set noat"
+.*:13: Warning: Macro used \$at after "\.set noat"
+.*:14: Warning: Macro used \$at after "\.set noat"
+.*:15: Warning: Macro used \$at after "\.set noat"
+.*:16: Warning: Macro used \$at after "\.set noat"
+.*:20: Warning: Macro used \$at after "\.set noat"
+.*:21: Warning: Macro used \$at after "\.set noat"
+.*:24: Warning: Macro used \$at after "\.set noat"
+.*:25: Warning: Macro used \$at after "\.set noat"
# Source file used to test the rol and ror macros.
+ # generate warnings for all uses of AT.
+ .set noat
+
foo:
rol $4,$5
rol $4,$5,$6
ror $4,1
ror $4,$5,1
ror $4,$5,0
+
+ rol $4,$5,32
+ rol $4,$5,33
+ rol $4,$5,63
+
+ ror $4,$5,32
+ ror $4,$5,33
+ ror $4,$5,63
+
.space 8
--- /dev/null
+#objdump: -dr --prefix-addresses -mmips:5400
+#as: -march=vr5400 -mtune=vr5400
+#name: MIPS hardware drol (vr5400)
+#source: rol64.s
+#stderr: rol64-hw.l
+
+# Test the drol and dror macros.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> dnegu at,a1
+0+0004 <[^>]*> drorv a0,a0,at
+0+0008 <[^>]*> dnegu a0,a2
+0+000c <[^>]*> drorv a0,a1,a0
+0+0010 <[^>]*> dror32 a0,a0,0x1f
+0+0014 <[^>]*> dror a0,a1,0x0
+0+0018 <[^>]*> dror32 a0,a1,0x1f
+0+001c <[^>]*> dror32 a0,a1,0x1
+0+0020 <[^>]*> dror32 a0,a1,0x0
+0+0024 <[^>]*> dror a0,a1,0x1f
+0+0028 <[^>]*> dror a0,a1,0x1
+0+002c <[^>]*> dror a0,a1,0x0
+0+0030 <[^>]*> drorv a0,a0,a1
+0+0034 <[^>]*> drorv a0,a1,a2
+0+0038 <[^>]*> dror a0,a0,0x1
+0+003c <[^>]*> dror a0,a1,0x0
+0+0040 <[^>]*> dror a0,a1,0x1
+0+0044 <[^>]*> dror a0,a1,0x1f
+0+0048 <[^>]*> dror32 a0,a1,0x0
+0+004c <[^>]*> dror32 a0,a1,0x1
+0+0050 <[^>]*> dror32 a0,a1,0x1f
+0+0054 <[^>]*> dror a0,a1,0x0
+0+0058 <[^>]*> dror32 a0,a1,0x1f
+0+005c <[^>]*> dror32 a0,a1,0x1
+0+0060 <[^>]*> dror32 a0,a1,0x0
+0+0064 <[^>]*> dror a0,a1,0x1f
+0+0068 <[^>]*> dror a0,a1,0x1
+0+006c <[^>]*> dror a0,a1,0x1
+0+0070 <[^>]*> dror a0,a1,0x1f
+0+0074 <[^>]*> dror32 a0,a1,0x0
+0+0078 <[^>]*> dror32 a0,a1,0x1
+0+007c <[^>]*> dror32 a0,a1,0x1f
+ ...
--- /dev/null
+.*: Assembler messages:
+.*:7: Warning: Macro used \$at after "\.set noat"
#objdump: -dr --prefix-addresses -mmips:4000
#as: -march=r4000 -mtune=r4000
-#name: MIPS R4000 drol
+#name: MIPS macro drol (r4000)
+#stderr: rol64.l
# Test the drol and dror macros.
0+00d4 <[^>]*> dsll a0,a1,0x1
0+00d8 <[^>]*> or a0,a0,at
0+00dc <[^>]*> dsrl a0,a1,0x0
+0+00e0 <[^>]*> dsll at,a1,0x1
+0+00e4 <[^>]*> dsrl32 a0,a1,0x1f
+0+00e8 <[^>]*> or a0,a0,at
+0+00ec <[^>]*> dsll at,a1,0x1f
+0+00f0 <[^>]*> dsrl32 a0,a1,0x1
+0+00f4 <[^>]*> or a0,a0,at
+0+00f8 <[^>]*> dsll32 at,a1,0x0
+0+00fc <[^>]*> dsrl32 a0,a1,0x0
+0+0100 <[^>]*> or a0,a0,at
+0+0104 <[^>]*> dsll32 at,a1,0x1
+0+0108 <[^>]*> dsrl a0,a1,0x1f
+0+010c <[^>]*> or a0,a0,at
+0+0110 <[^>]*> dsll32 at,a1,0x1f
+0+0114 <[^>]*> dsrl a0,a1,0x1
+0+0118 <[^>]*> or a0,a0,at
+0+011c <[^>]*> dsrl at,a1,0x1
+0+0120 <[^>]*> dsll32 a0,a1,0x1f
+0+0124 <[^>]*> or a0,a0,at
+0+0128 <[^>]*> dsrl at,a1,0x1f
+0+012c <[^>]*> dsll32 a0,a1,0x1
+0+0130 <[^>]*> or a0,a0,at
+0+0134 <[^>]*> dsrl32 at,a1,0x0
+0+0138 <[^>]*> dsll32 a0,a1,0x0
+0+013c <[^>]*> or a0,a0,at
+0+0140 <[^>]*> dsrl32 at,a1,0x1
+0+0144 <[^>]*> dsll a0,a1,0x1f
+0+0148 <[^>]*> or a0,a0,at
+0+014c <[^>]*> dsrl32 at,a1,0x1f
+0+0150 <[^>]*> dsll a0,a1,0x1
+0+0154 <[^>]*> or a0,a0,at
...
--- /dev/null
+.*: Assembler messages:
+.*:7: Warning: Macro used \$at after "\.set noat"
+.*:8: Warning: Macro used \$at after "\.set noat"
+.*:9: Warning: Macro used \$at after "\.set noat"
+.*:11: Warning: Macro used \$at after "\.set noat"
+.*:12: Warning: Macro used \$at after "\.set noat"
+.*:13: Warning: Macro used \$at after "\.set noat"
+.*:14: Warning: Macro used \$at after "\.set noat"
+.*:15: Warning: Macro used \$at after "\.set noat"
+.*:18: Warning: Macro used \$at after "\.set noat"
+.*:19: Warning: Macro used \$at after "\.set noat"
+.*:20: Warning: Macro used \$at after "\.set noat"
+.*:22: Warning: Macro used \$at after "\.set noat"
+.*:23: Warning: Macro used \$at after "\.set noat"
+.*:24: Warning: Macro used \$at after "\.set noat"
+.*:25: Warning: Macro used \$at after "\.set noat"
+.*:26: Warning: Macro used \$at after "\.set noat"
+.*:29: Warning: Macro used \$at after "\.set noat"
+.*:30: Warning: Macro used \$at after "\.set noat"
+.*:31: Warning: Macro used \$at after "\.set noat"
+.*:32: Warning: Macro used \$at after "\.set noat"
+.*:33: Warning: Macro used \$at after "\.set noat"
+.*:35: Warning: Macro used \$at after "\.set noat"
+.*:36: Warning: Macro used \$at after "\.set noat"
+.*:37: Warning: Macro used \$at after "\.set noat"
+.*:38: Warning: Macro used \$at after "\.set noat"
+.*:39: Warning: Macro used \$at after "\.set noat"
# Source file used to test the drol and dror macros.
+ # generate warnings for all uses of AT.
+ .set noat
+
foo:
drol $4,$5
drol $4,$5,$6
dror $4,$5,63
dror $4,$5,64
+ drol $4,$5,65
+ drol $4,$5,95
+ drol $4,$5,96
+ drol $4,$5,97
+ drol $4,$5,127
+
+ dror $4,$5,65
+ dror $4,$5,95
+ dror $4,$5,96
+ dror $4,$5,97
+ dror $4,$5,127
+
# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
.space 8
+2002-12-18 Chris Demetriou <cgd@broadcom.com>
+
+ * mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two
+ "dror" entries, and reorder the remaining "dror" and "ror" entries.
+
2002-12-16 DJ Delorie <dj@delorie.com>
* xstormy16-asm.c (parse_immediate16): Add prototype.
{"dret", "", 0x7000003e, 0xffffffff, 0, N5 },
{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 },
{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 },
-{"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
-{"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
-{"dror", "d,w,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 }, /* drorv */
-{"dror", "d,w,>", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
-{"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_d|RD_t, N5 },
{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 },
{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 },
+{"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_d|RD_t, N5 },
+{"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
+{"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
{"rneu.qh", "X,Q", 0x78200022, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX },
{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
-{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
-{"ror", "d,w,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 }, /* rorv */
-{"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d|RD_t, N5 },
{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
+{"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d|RD_t, N5 },
+{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
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