ScheduleAndEmitDAG(DAG);
}
-static void SelectFrameIndex(SelectionDAG *CurDAG, SDOperand &Result, SDNode *N) {
+static void SelectFrameIndex(SelectionDAG *CurDAG, SDOperand &Result, SDNode *N, SDOperand Op) {
int FI = cast<FrameIndexSDNode>(N)->getIndex();
- Result = CurDAG->SelectNodeTo(N, ARM::movrr, MVT::i32,
- CurDAG->getTargetFrameIndex(FI, MVT::i32));
+
+ SDOperand TFI = CurDAG->getTargetFrameIndex(FI, Op.getValueType());
+
+ Result = CurDAG->SelectNodeTo(N, ARM::movri, Op.getValueType(), TFI);
}
void ARMDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
break;
case ISD::FrameIndex:
- SelectFrameIndex(CurDAG, Result, N);
+ SelectFrameIndex(CurDAG, Result, N, Op);
break;
}
}
///
bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI,
unsigned &SrcReg, unsigned &DstReg) const {
- return false;
+ MachineOpCode oc = MI.getOpcode();
+ switch (oc) {
+ default:
+ return false;
+ case ARM::movrr:
+ assert(MI.getNumOperands() == 2 &&
+ MI.getOperand(0).isRegister() &&
+ MI.getOperand(1).isRegister() &&
+ "Invalid ARM MOV instruction");
+ SrcReg = MI.getOperand(1).getReg();;
+ DstReg = MI.getOperand(0).getReg();;
+ return true;
+ }
}
/// isLoadFromStackSlot - If the specified machine instruction is a direct
MachineBasicBlock &MBB = *MI.getParent();
MachineFunction &MF = *MBB.getParent();
- assert (MI.getOpcode() == ARM::movrr);
+ assert (MI.getOpcode() == ARM::movri);
unsigned FrameIdx = 1;