[InstCombine] add test for missing vector optimization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271806 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/Transforms/InstCombine/signed-comparison.ll b/test/Transforms/InstCombine/signed-comparison.ll
index 17dd0db..5092ce7 100644 (file)
--- a/test/Transforms/InstCombine/signed-comparison.ll
+++ b/test/Transforms/InstCombine/signed-comparison.ll
@@ -3,8 +3,8 @@
 
 ; Convert the zext+slt into a simple ult.
 
-define i1 @foo(i16 %t4) {
-; CHECK-LABEL: @foo(
+define i1 @scalar_zext_slt(i16 %t4) {
+; CHECK-LABEL: @scalar_zext_slt(
 ; CHECK-NEXT:    [[T6:%.*]] = icmp ult i16 %t4, 500
 ; CHECK-NEXT:    ret i1 [[T6]]
 ;
@@ -12,3 +12,17 @@ define i1 @foo(i16 %t4) {
   %t6 = icmp slt i32 %t5, 500
   ret i1 %t6
 }
+
+; FIXME: Vector compare should work the same as scalar.
+
+define <4 x i1> @vector_zext_slt(<4 x i16> %t4) {
+; CHECK-LABEL: @vector_zext_slt(
+; CHECK-NEXT:    [[T5:%.*]] = zext <4 x i16> %t4 to <4 x i32>
+; CHECK-NEXT:    [[T6:%.*]] = icmp ult <4 x i32> [[T5]], <i32 500, i32 0, i32 501, i32 65535>
+; CHECK-NEXT:    ret <4 x i1> [[T6]]
+;
+  %t5 = zext <4 x i16> %t4 to <4 x i32>
+  %t6 = icmp slt <4 x i32> %t5, <i32 500, i32 0, i32 501, i32 65535>
+  ret <4 x i1> %t6
+}
+