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r600g: use meaningful defines for chiprev
authorAlex Deucher <alexdeucher@gmail.com>
Fri, 19 Nov 2010 20:32:02 +0000 (15:32 -0500)
committerAlex Deucher <alexdeucher@gmail.com>
Fri, 19 Nov 2010 20:32:02 +0000 (15:32 -0500)
Makes the code much clearer.

src/gallium/drivers/r600/r600_asm.c
src/gallium/drivers/r600/r600_opcodes.h
src/gallium/drivers/r600/r600_shader.c

index 56a078d..ba1471e 100644 (file)
@@ -138,20 +138,20 @@ int r600_bc_init(struct r600_bc *bc, enum radeon_family family)
        case CHIP_RV635:
        case CHIP_RS780:
        case CHIP_RS880:
-               bc->chiprev = 0;
+               bc->chiprev = CHIPREV_R600;
                break;
        case CHIP_RV770:
        case CHIP_RV730:
        case CHIP_RV710:
        case CHIP_RV740:
-               bc->chiprev = 1;
+               bc->chiprev = CHIPREV_R700;
                break;
        case CHIP_CEDAR:
        case CHIP_REDWOOD:
        case CHIP_JUNIPER:
        case CHIP_CYPRESS:
        case CHIP_HEMLOCK:
-               bc->chiprev = 2;
+               bc->chiprev = CHIPREV_EVERGREEN;
                break;
        default:
                R600_ERR("unknown family %d\n", bc->family);
@@ -602,13 +602,13 @@ static int r600_bc_vtx_build(struct r600_bc *bc, struct r600_bc_vtx *vtx, unsign
        if (bc->type == -1) {
                switch (bc->chiprev) {
                /* r600 */
-               case 0:
+               case CHIPREV_R600:
                /* r700 */
-               case 1:
+               case CHIPREV_R700:
                        fetch_resource_start = 160;
                        break;
                /* evergreen */
-               case 2:
+               case CHIPREV_EVERGREEN:
                        fetch_resource_start = 0;
                        break;
                default:
@@ -735,7 +735,7 @@ static int r600_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf)
                        S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache0_addr) |
                        S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache1_addr) |
                                        S_SQ_CF_ALU_WORD1_BARRIER(1) |
-                                       S_SQ_CF_ALU_WORD1_USES_WATERFALL(bc->chiprev == 0 ? cf->r6xx_uses_waterfall : 0) |
+                                       S_SQ_CF_ALU_WORD1_USES_WATERFALL(bc->chiprev == CHIPREV_R600 ? cf->r6xx_uses_waterfall : 0) |
                                        S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
                break;
        case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
@@ -842,7 +842,7 @@ int r600_bc_build(struct r600_bc *bc)
                return -ENOMEM;
        LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
                addr = cf->addr;
-               if (bc->chiprev == 2)
+               if (bc->chiprev == CHIPREV_EVERGREEN)
                        r = eg_bc_cf_build(bc, cf);
                else
                        r = r600_bc_cf_build(bc, cf);
@@ -853,11 +853,11 @@ int r600_bc_build(struct r600_bc *bc)
                case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
                        LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
                                switch(bc->chiprev) {
-                               case 0:
+                               case CHIPREV_R600:
                                        r = r600_bc_alu_build(bc, alu, addr);
                                        break;
-                               case 1:
-                               case 2: /* eg alu is same encoding as r700 */
+                               case CHIPREV_R700:
+                               case CHIPREV_EVERGREEN: /* eg alu is same encoding as r700 */
                                        r = r700_bc_alu_build(bc, alu, addr);
                                        break;
                                default:
index 4f9b39a..2ee0c83 100644 (file)
 #define     EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_EXPORT_COMBINED 0x0000005B
 #define     EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RAT_COMBINED_CACHELESS  0x0000005C
 
-#define BC_INST(bc, x) ((bc)->chiprev == 2 ? EG_##x : x)
 
-#define CTX_INST(x) (ctx->bc->chiprev == 2 ? EG_##x : x)
+#define CHIPREV_R600      0
+#define CHIPREV_R700      1
+#define CHIPREV_EVERGREEN 2
+
+#define BC_INST(bc, x) ((bc)->chiprev == CHIPREV_EVERGREEN ? EG_##x : x)
+
+#define CTX_INST(x) (ctx->bc->chiprev == CHIPREV_EVERGREEN ? EG_##x : x)
 
 #endif
index 2e4056d..a2b516f 100644 (file)
@@ -532,7 +532,7 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
                        if (r)
                                return r;
                }
-               if (ctx->type == TGSI_PROCESSOR_FRAGMENT && ctx->bc->chiprev == 2) {
+               if (ctx->type == TGSI_PROCESSOR_FRAGMENT && ctx->bc->chiprev == CHIPREV_EVERGREEN) {
                        /* turn input into interpolate on EG */
                        if (ctx->shader->input[i].name != TGSI_SEMANTIC_POSITION) {
                                if (ctx->shader->input[i].interpolate > 0) {
@@ -665,13 +665,13 @@ int r600_shader_from_tgsi(const struct tgsi_token *tokens, struct r600_shader *s
        }
        if (ctx.type == TGSI_PROCESSOR_VERTEX) {
                ctx.file_offset[TGSI_FILE_INPUT] = 1;
-               if (ctx.bc->chiprev == 2) {
+               if (ctx.bc->chiprev == CHIPREV_EVERGREEN) {
                        r600_bc_add_cfinst(ctx.bc, EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS);
                } else {
                        r600_bc_add_cfinst(ctx.bc, V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS);
                }
        }
-       if (ctx.type == TGSI_PROCESSOR_FRAGMENT && ctx.bc->chiprev == 2) {
+       if (ctx.type == TGSI_PROCESSOR_FRAGMENT && ctx.bc->chiprev == CHIPREV_EVERGREEN) {
                ctx.file_offset[TGSI_FILE_INPUT] = evergreen_gpr_count(&ctx);
        }
        ctx.file_offset[TGSI_FILE_OUTPUT] = ctx.file_offset[TGSI_FILE_INPUT] +
@@ -717,7 +717,7 @@ int r600_shader_from_tgsi(const struct tgsi_token *tokens, struct r600_shader *s
                        /* reserve first tmp for everyone */
                        r600_get_temp(&ctx);
                        opcode = ctx.parse.FullToken.FullInstruction.Instruction.Opcode;
-                       if (ctx.bc->chiprev == 2)
+                       if (ctx.bc->chiprev == CHIPREV_EVERGREEN)
                                ctx.inst_info = &eg_shader_tgsi_instruction[opcode];
                        else
                                ctx.inst_info = &r600_shader_tgsi_instruction[opcode];
@@ -841,7 +841,7 @@ int r600_shader_from_tgsi(const struct tgsi_token *tokens, struct r600_shader *s
        }
        /* add return to fetch shader */
        if (ctx.type == TGSI_PROCESSOR_VERTEX) {
-               if (ctx.bc->chiprev == 2) {
+               if (ctx.bc->chiprev == CHIPREV_EVERGREEN) {
                        r600_bc_add_cfinst(ctx.bc_fetch, EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN);
                } else {
                        r600_bc_add_cfinst(ctx.bc_fetch, V_SQ_CF_WORD1_SQ_CF_INST_RETURN);
@@ -1149,7 +1149,7 @@ static int tgsi_setup_trig(struct r600_shader_ctx *ctx,
        if (r)
                return r;
 
-       if (ctx->bc->chiprev == 0) {
+       if (ctx->bc->chiprev == CHIPREV_R600) {
                lit_vals[0] = fui(3.1415926535897f * 2.0f);
                lit_vals[1] = fui(-3.1415926535897f);
        } else {