This fixes a bug uncovered by my NIR integer division by constant
optimization series.
Fixes:
19f9cb72c8b "i965/fs: Add pass to propagate conditional..."
Fixes:
627f94b72e0 "i965/vec4: adding vec4_cmod_propagation..."
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
}
bool
+fs_inst::can_do_cmod()
+{
+ if (!backend_instruction::can_do_cmod())
+ return false;
+
+ /* The accumulator result appears to get used for the conditional modifier
+ * generation. When negating a UD value, there is a 33rd bit generated for
+ * the sign in the accumulator value, so now you can't check, for example,
+ * equality with a 32-bit value. See piglit fs-op-neg-uvec4.
+ */
+ for (unsigned i = 0; i < sources; i++) {
+ if (type_is_unsigned_int(src[i].type) && src[i].negate)
+ return false;
+ }
+
+ return true;
+}
+
+bool
fs_inst::can_change_types() const
{
return dst.type == src[0].type &&
unsigned components_read(unsigned i) const;
unsigned size_read(int arg) const;
bool can_do_source_mods(const struct gen_device_info *devinfo);
+ bool can_do_cmod();
bool can_change_types() const;
bool has_source_and_destination_hazard() const;
int swizzle, int swizzle_mask);
void reswizzle(int dst_writemask, int swizzle);
bool can_do_source_mods(const struct gen_device_info *devinfo);
+ bool can_do_cmod();
bool can_do_writemask(const struct gen_device_info *devinfo);
bool can_change_types() const;
bool has_source_and_destination_hazard() const;
}
}
+static inline bool
+type_is_unsigned_int(enum brw_reg_type tp)
+{
+ return tp == BRW_REGISTER_TYPE_UB ||
+ tp == BRW_REGISTER_TYPE_UW ||
+ tp == BRW_REGISTER_TYPE_UD ||
+ tp == BRW_REGISTER_TYPE_UQ;
+}
+
/**
* Construct a brw_reg.
* \param file one of the BRW_x_REGISTER_FILE values
}
bool
+vec4_instruction::can_do_cmod()
+{
+ if (!backend_instruction::can_do_cmod())
+ return false;
+
+ /* The accumulator result appears to get used for the conditional modifier
+ * generation. When negating a UD value, there is a 33rd bit generated for
+ * the sign in the accumulator value, so now you can't check, for example,
+ * equality with a 32-bit value. See piglit fs-op-neg-uvec4.
+ */
+ for (unsigned i = 0; i < 3; i++) {
+ if (src[i].file != BAD_FILE &&
+ type_is_unsigned_int(src[i].type) && src[i].negate)
+ return false;
+ }
+
+ return true;
+}
+
+bool
vec4_instruction::can_do_writemask(const struct gen_device_info *devinfo)
{
switch (opcode) {