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radeonsi: don't allocate DCC for the temporary MSAA resolve surface
authorMarek Olšák <marek.olsak@amd.com>
Sun, 5 Jun 2016 23:42:46 +0000 (01:42 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 7 Jun 2016 22:22:45 +0000 (00:22 +0200)
Allocating it has no effect, but it adds overhead (useless DCC clear).

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeon/r600_texture.c
src/gallium/drivers/radeonsi/si_blit.c

index a917549..bb090d6 100644 (file)
@@ -48,6 +48,7 @@
 #define R600_RESOURCE_FLAG_TRANSFER            (PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
 #define R600_RESOURCE_FLAG_FLUSHED_DEPTH       (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
 #define R600_RESOURCE_FLAG_FORCE_TILING                (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
+#define R600_RESOURCE_FLAG_DISABLE_DCC         (PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
 
 #define R600_CONTEXT_STREAMOUT_FLUSH           (1u << 0)
 /* Pipeline & streamout query controls. */
index 9daad65..b0f375e 100644 (file)
@@ -263,7 +263,8 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
        }
 
        if (rscreen->chip_class >= VI &&
-           ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT)
+           (ptex->flags & R600_RESOURCE_FLAG_DISABLE_DCC ||
+            ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT))
                surface->flags |= RADEON_SURF_DISABLE_DCC;
 
        if (ptex->bind & PIPE_BIND_SCANOUT) {
index 2059d9d..dee3c2f 100644 (file)
@@ -928,7 +928,8 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
        templ.depth0 = 1;
        templ.array_size = 1;
        templ.usage = PIPE_USAGE_DEFAULT;
-       templ.flags = R600_RESOURCE_FLAG_FORCE_TILING;
+       templ.flags = R600_RESOURCE_FLAG_FORCE_TILING |
+                     R600_RESOURCE_FLAG_DISABLE_DCC;
 
        tmp = ctx->screen->resource_create(ctx->screen, &templ);
        if (!tmp)