intel/isl: Don't align the height of the last array slice

We were calculating the total height of 2D surfaces by multiplying the
row pitch by the number of slices.  This means that we actually request
slightly more space than actually needed since the padding on the last
slice is unnecessary.  For tiled surfaces this is not likely to make a
difference.  For linear surfaces, on the other hand, this means we may
require additional memory.  In particular, this makes the i965 driver
reject EGL imports of buffers which do not have this extra padding.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index d3124de..6b4203d 100644 (file)
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -982,7 +982,8 @@ isl_calc_phys_total_extent_el_gen4_2d(
                                            &phys_slice0_sa);
    *total_extent_el = (struct isl_extent2d) {
       .w = isl_assert_div(phys_slice0_sa.w, fmtl->bw),
-      .h = *array_pitch_el_rows * phys_level0_sa->array_len,
+      .h = *array_pitch_el_rows * (phys_level0_sa->array_len - 1) +
+           isl_assert_div(phys_slice0_sa.h, fmtl->bh),
    };
 }