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MIPS: Do not flush tlb page when updating PTE entry
authorBibo Mao <maobibo@loongson.cn>
Wed, 27 May 2020 02:25:17 +0000 (10:25 +0800)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Wed, 27 May 2020 11:05:19 +0000 (13:05 +0200)
It is not necessary to flush tlb page on all CPUs if suitable PTE
entry exists already during page fault handling, just updating
TLB is fine.

Here redefine flush_tlb_fix_spurious_fault as empty on MIPS system.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/include/asm/pgtable.h

index 9b01d2d..f8f48fc 100644 (file)
@@ -478,6 +478,11 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
        return __pgprot(prot);
 }
 
+static inline void flush_tlb_fix_spurious_fault(struct vm_area_struct *vma,
+                                               unsigned long address)
+{
+}
+
 /*
  * Conversion functions: convert a page and protection to a page entry,
  * and a page entry and page directory to the page they refer to.