amdgpu: add amdgpu_bo_va_op_raw

This variant allows the caller full control over flags and size, and
allows passing a NULL bo (for PRT support).

Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Jerry Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 7b26a04..6b2ded8 100644 (file)
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1186,6 +1186,34 @@ int amdgpu_bo_va_op(amdgpu_bo_handle bo,
                    uint32_t ops);
 
 /**
+ *  VA mapping/unmapping for a buffer object or PRT region.
+ *
+ * This is not a simple drop-in extension for amdgpu_bo_va_op; instead, all
+ * parameters are treated "raw", i.e. size is not automatically aligned, and
+ * all flags must be specified explicitly.
+ *
+ * \param  dev         - \c [in] device handle
+ * \param  bo          - \c [in] BO handle (may be NULL)
+ * \param  offset      - \c [in] Start offset to map
+ * \param  size                - \c [in] Size to map
+ * \param  addr                - \c [in] Start virtual address.
+ * \param  flags       - \c [in] Supported flags for mapping/unmapping
+ * \param  ops         - \c [in] AMDGPU_VA_OP_MAP or AMDGPU_VA_OP_UNMAP
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+*/
+
+int amdgpu_bo_va_op_raw(amdgpu_device_handle dev,
+                       amdgpu_bo_handle bo,
+                       uint64_t offset,
+                       uint64_t size,
+                       uint64_t addr,
+                       uint64_t flags,
+                       uint32_t ops);
+
+/**
  *  create semaphore
  *
  * \param   sem           - \c [out] semaphore handle

diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
index d30fd1e..f725bfd 100644 (file)
--- a/amdgpu/amdgpu_bo.c
+++ b/amdgpu/amdgpu_bo.c
@@ -683,6 +683,23 @@ int amdgpu_bo_va_op(amdgpu_bo_handle bo,
                     uint32_t ops)
 {
        amdgpu_device_handle dev = bo->dev;
+
+       size = ALIGN(size, getpagesize());
+
+       return amdgpu_bo_va_op_raw(dev, bo, offset, size, addr,
+                                  AMDGPU_VM_PAGE_READABLE |
+                                  AMDGPU_VM_PAGE_WRITEABLE |
+                                  AMDGPU_VM_PAGE_EXECUTABLE, ops);
+}
+
+int amdgpu_bo_va_op_raw(amdgpu_device_handle dev,
+                       amdgpu_bo_handle bo,
+                       uint64_t offset,
+                       uint64_t size,
+                       uint64_t addr,
+                       uint64_t flags,
+                       uint32_t ops)
+{
        struct drm_amdgpu_gem_va va;
        int r;
 
@@ -690,14 +707,12 @@ int amdgpu_bo_va_op(amdgpu_bo_handle bo,
                return -EINVAL;
 
        memset(&va, 0, sizeof(va));
-       va.handle = bo->handle;
+       va.handle = bo ? bo->handle : 0;
        va.operation = ops;
-       va.flags = AMDGPU_VM_PAGE_READABLE |
-                  AMDGPU_VM_PAGE_WRITEABLE |
-                  AMDGPU_VM_PAGE_EXECUTABLE;
+       va.flags = flags;
        va.va_address = addr;
        va.offset_in_bo = offset;
-       va.map_size = ALIGN(size, getpagesize());
+       va.map_size = size;
 
        r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_VA, &va, sizeof(va));