drm/amdgpu: Add pci replay count to nbio v7.9

Add implementation to get pcie replay count for nbio v7.9.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
index cd1a02d..1d1ab18 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
@@ -32,6 +32,9 @@
 
 #define NPS_MODE_MASK 0x000000FFL
 
+/* Core 0 Port 0 counter */
+#define smnPCIEP_NAK_COUNTER 0x1A340218
+
 static void nbio_v7_9_remap_hdp_registers(struct amdgpu_device *adev)
 {
        WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,
@@ -427,6 +430,22 @@ static void nbio_v7_9_init_registers(struct amdgpu_device *adev)
        }
 }
 
+static u64 nbio_v7_9_get_pcie_replay_count(struct amdgpu_device *adev)
+{
+       u32 val, nak_r, nak_g;
+
+       if (adev->flags & AMD_IS_APU)
+               return 0;
+
+       /* Get the number of NAKs received and generated */
+       val = RREG32_PCIE(smnPCIEP_NAK_COUNTER);
+       nak_r = val & 0xFFFF;
+       nak_g = val >> 16;
+
+       /* Add the total number of NAKs, i.e the number of replays */
+       return (nak_r + nak_g);
+}
+
 const struct amdgpu_nbio_funcs nbio_v7_9_funcs = {
        .get_hdp_flush_req_offset = nbio_v7_9_get_hdp_flush_req_offset,
        .get_hdp_flush_done_offset = nbio_v7_9_get_hdp_flush_done_offset,
@@ -450,4 +469,5 @@ const struct amdgpu_nbio_funcs nbio_v7_9_funcs = {
        .get_compute_partition_mode = nbio_v7_9_get_compute_partition_mode,
        .get_memory_partition_mode = nbio_v7_9_get_memory_partition_mode,
        .init_registers = nbio_v7_9_init_registers,
+       .get_pcie_replay_count = nbio_v7_9_get_pcie_replay_count,
 };

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index afcaead..158e611 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -895,7 +895,7 @@ static const struct amdgpu_asic_funcs aqua_vanjaram_asic_funcs =
        .init_doorbell_index = &aqua_vanjaram_doorbell_index_init,
        .get_pcie_usage = &vega20_get_pcie_usage,
        .need_reset_on_init = &soc15_need_reset_on_init,
-       .get_pcie_replay_count = &soc15_get_pcie_replay_count,
+       .get_pcie_replay_count = &amdgpu_nbio_get_pcie_replay_count,
        .supports_baco = &soc15_supports_baco,
        .pre_asic_init = &soc15_pre_asic_init,
        .query_video_codecs = &soc15_query_video_codecs,