[X86][SSE] Regenerate re-materialized store tests and add 64-bit test target

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295666 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/vec_zero_cse.ll b/test/CodeGen/X86/vec_zero_cse.ll
index 8ed8083..75e8534 100644 (file)
--- a/test/CodeGen/X86/vec_zero_cse.ll
+++ b/test/CodeGen/X86/vec_zero_cse.ll
@@ -1,4 +1,7 @@
-; RUN: llc < %s -relocation-model=static -mtriple=i686-unknown -mattr=+mmx,+sse3 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -relocation-model=static -mtriple=i686-unknown -mattr=+mmx,+sse3   | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -relocation-model=static -mtriple=x86_64-unknown -mattr=+mmx,+sse3 | FileCheck %s --check-prefix=X64
+
 ; 64-bit stores here do not use MMX.
 
 @M1 = external global <1 x i64>
@@ -8,35 +11,78 @@
 @S2 = external global <4 x i32>
 
 define void @test1() {
-;CHECK-LABEL: @test1
-;CHECK: xorps
+; X32-LABEL: test1:
+; X32:       # BB#0:
+; X32-NEXT:    movl $0, M1+4
+; X32-NEXT:    movl $0, M1
+; X32-NEXT:    xorps %xmm0, %xmm0
+; X32-NEXT:    movlps %xmm0, M2
+; X32-NEXT:    retl
+;
+; X64-LABEL: test1:
+; X64:       # BB#0:
+; X64-NEXT:    movq $0, {{.*}}(%rip)
+; X64-NEXT:    movq $0, {{.*}}(%rip)
+; X64-NEXT:    retq
   store <1 x i64> zeroinitializer, <1 x i64>* @M1
   store <2 x i32> zeroinitializer, <2 x i32>* @M2
   ret void
 }
 
 define void @test2() {
-;CHECK-LABEL: @test2
-;CHECK: pcmpeqd
+; X32-LABEL: test2:
+; X32:       # BB#0:
+; X32-NEXT:    movl $-1, M1+4
+; X32-NEXT:    movl $-1, M1
+; X32-NEXT:    pcmpeqd %xmm0, %xmm0
+; X32-NEXT:    movq %xmm0, M2
+; X32-NEXT:    retl
+;
+; X64-LABEL: test2:
+; X64:       # BB#0:
+; X64-NEXT:    movq $-1, {{.*}}(%rip)
+; X64-NEXT:    movq {{.*}}(%rip), %rax
+; X64-NEXT:    movq %rax, {{.*}}(%rip)
+; X64-NEXT:    retq
   store <1 x i64> < i64 -1 >, <1 x i64>* @M1
   store <2 x i32> < i32 -1, i32 -1 >, <2 x i32>* @M2
   ret void
 }
 
 define void @test3() {
-;CHECK-LABEL: @test3
-;CHECK: xorps
+; X32-LABEL: test3:
+; X32:       # BB#0:
+; X32-NEXT:    xorps %xmm0, %xmm0
+; X32-NEXT:    movaps %xmm0, S1
+; X32-NEXT:    movaps %xmm0, S2
+; X32-NEXT:    retl
+;
+; X64-LABEL: test3:
+; X64:       # BB#0:
+; X64-NEXT:    xorps %xmm0, %xmm0
+; X64-NEXT:    movaps %xmm0, {{.*}}(%rip)
+; X64-NEXT:    movaps %xmm0, {{.*}}(%rip)
+; X64-NEXT:    retq
   store <2 x i64> zeroinitializer, <2 x i64>* @S1
   store <4 x i32> zeroinitializer, <4 x i32>* @S2
   ret void
 }
 
 define void @test4() {
-;CHECK-LABEL: @test4
-;CHECK: pcmpeqd
+; X32-LABEL: test4:
+; X32:       # BB#0:
+; X32-NEXT:    pcmpeqd %xmm0, %xmm0
+; X32-NEXT:    movdqa %xmm0, S1
+; X32-NEXT:    movdqa %xmm0, S2
+; X32-NEXT:    retl
+;
+; X64-LABEL: test4:
+; X64:       # BB#0:
+; X64-NEXT:    pcmpeqd %xmm0, %xmm0
+; X64-NEXT:    movdqa %xmm0, {{.*}}(%rip)
+; X64-NEXT:    movdqa %xmm0, {{.*}}(%rip)
+; X64-NEXT:    retq
   store <2 x i64> < i64 -1, i64 -1>, <2 x i64>* @S1
   store <4 x i32> < i32 -1, i32 -1, i32 -1, i32 -1 >, <4 x i32>* @S2
   ret void
 }
-
-