[X86] Fix patterns that turn cmove/cmovne+ctlz/cttz into lzcnt/tzcnt instructions...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267311 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 2788906..4504a16 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -918,12 +918,6 @@ def X86_COND_O   : PatLeaf<(i8 13)>;
 def X86_COND_P   : PatLeaf<(i8 14)>; // alt. COND_PE
 def X86_COND_S   : PatLeaf<(i8 15)>;
 
-// Predicate used to help when pattern matching LZCNT/TZCNT.
-def X86_COND_E_OR_NE : ImmLeaf<i8, [{
-  return (Imm == X86::COND_E) || (Imm == X86::COND_NE);
-}]>;
-
-
 def i16immSExt8  : ImmLeaf<i16, [{ return isInt<8>(Imm); }]>;
 def i32immSExt8  : ImmLeaf<i32, [{ return isInt<8>(Imm); }]>;
 def i64immSExt8  : ImmLeaf<i64, [{ return isInt<8>(Imm); }]>;
@@ -2172,41 +2166,41 @@ let Predicates = [HasLZCNT], Defs = [EFLAGS] in {
 }
 
 let Predicates = [HasLZCNT] in {
-  def : Pat<(X86cmov (ctlz GR16:$src), (i16 16), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (ctlz GR16:$src), (i16 16), (X86_COND_E),
               (X86cmp GR16:$src, (i16 0))),
             (LZCNT16rr GR16:$src)>;
-  def : Pat<(X86cmov (ctlz GR32:$src), (i32 32), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (ctlz GR32:$src), (i32 32), (X86_COND_E),
               (X86cmp GR32:$src, (i32 0))),
             (LZCNT32rr GR32:$src)>;
-  def : Pat<(X86cmov (ctlz GR64:$src), (i64 64), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (ctlz GR64:$src), (i64 64), (X86_COND_E),
               (X86cmp GR64:$src, (i64 0))),
             (LZCNT64rr GR64:$src)>;
-  def : Pat<(X86cmov (i16 16), (ctlz GR16:$src), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i16 16), (ctlz GR16:$src), (X86_COND_NE),
               (X86cmp GR16:$src, (i16 0))),
             (LZCNT16rr GR16:$src)>;
-  def : Pat<(X86cmov (i32 32), (ctlz GR32:$src), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i32 32), (ctlz GR32:$src), (X86_COND_NE),
               (X86cmp GR32:$src, (i32 0))),
             (LZCNT32rr GR32:$src)>;
-  def : Pat<(X86cmov (i64 64), (ctlz GR64:$src), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i64 64), (ctlz GR64:$src), (X86_COND_NE),
               (X86cmp GR64:$src, (i64 0))),
             (LZCNT64rr GR64:$src)>;
 
-  def : Pat<(X86cmov (ctlz (loadi16 addr:$src)), (i16 16), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (ctlz (loadi16 addr:$src)), (i16 16), (X86_COND_E),
               (X86cmp (loadi16 addr:$src), (i16 0))),
             (LZCNT16rm addr:$src)>;
-  def : Pat<(X86cmov (ctlz (loadi32 addr:$src)), (i32 32), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (ctlz (loadi32 addr:$src)), (i32 32), (X86_COND_E),
               (X86cmp (loadi32 addr:$src), (i32 0))),
             (LZCNT32rm addr:$src)>;
-  def : Pat<(X86cmov (ctlz (loadi64 addr:$src)), (i64 64), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (ctlz (loadi64 addr:$src)), (i64 64), (X86_COND_E),
               (X86cmp (loadi64 addr:$src), (i64 0))),
             (LZCNT64rm addr:$src)>;
-  def : Pat<(X86cmov (i16 16), (ctlz (loadi16 addr:$src)), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i16 16), (ctlz (loadi16 addr:$src)), (X86_COND_NE),
               (X86cmp (loadi16 addr:$src), (i16 0))),
             (LZCNT16rm addr:$src)>;
-  def : Pat<(X86cmov (i32 32), (ctlz (loadi32 addr:$src)), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i32 32), (ctlz (loadi32 addr:$src)), (X86_COND_NE),
               (X86cmp (loadi32 addr:$src), (i32 0))),
             (LZCNT32rm addr:$src)>;
-  def : Pat<(X86cmov (i64 64), (ctlz (loadi64 addr:$src)), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i64 64), (ctlz (loadi64 addr:$src)), (X86_COND_NE),
               (X86cmp (loadi64 addr:$src), (i64 0))),
             (LZCNT64rm addr:$src)>;
 }
@@ -2288,41 +2282,41 @@ let Predicates = [HasBMI] in {
 }
 
 let Predicates = [HasBMI] in {
-  def : Pat<(X86cmov (cttz GR16:$src), (i16 16), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (cttz GR16:$src), (i16 16), (X86_COND_E),
               (X86cmp GR16:$src, (i16 0))),
             (TZCNT16rr GR16:$src)>;
-  def : Pat<(X86cmov (cttz GR32:$src), (i32 32), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (cttz GR32:$src), (i32 32), (X86_COND_E),
               (X86cmp GR32:$src, (i32 0))),
             (TZCNT32rr GR32:$src)>;
-  def : Pat<(X86cmov (cttz GR64:$src), (i64 64), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (cttz GR64:$src), (i64 64), (X86_COND_E),
               (X86cmp GR64:$src, (i64 0))),
             (TZCNT64rr GR64:$src)>;
-  def : Pat<(X86cmov (i16 16), (cttz GR16:$src), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i16 16), (cttz GR16:$src), (X86_COND_NE),
               (X86cmp GR16:$src, (i16 0))),
             (TZCNT16rr GR16:$src)>;
-  def : Pat<(X86cmov (i32 32), (cttz GR32:$src), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i32 32), (cttz GR32:$src), (X86_COND_NE),
               (X86cmp GR32:$src, (i32 0))),
             (TZCNT32rr GR32:$src)>;
-  def : Pat<(X86cmov (i64 64), (cttz GR64:$src), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i64 64), (cttz GR64:$src), (X86_COND_NE),
               (X86cmp GR64:$src, (i64 0))),
             (TZCNT64rr GR64:$src)>;
 
-  def : Pat<(X86cmov (cttz (loadi16 addr:$src)), (i16 16), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (cttz (loadi16 addr:$src)), (i16 16), (X86_COND_E),
               (X86cmp (loadi16 addr:$src), (i16 0))),
             (TZCNT16rm addr:$src)>;
-  def : Pat<(X86cmov (cttz (loadi32 addr:$src)), (i32 32), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (cttz (loadi32 addr:$src)), (i32 32), (X86_COND_E),
               (X86cmp (loadi32 addr:$src), (i32 0))),
             (TZCNT32rm addr:$src)>;
-  def : Pat<(X86cmov (cttz (loadi64 addr:$src)), (i64 64), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (cttz (loadi64 addr:$src)), (i64 64), (X86_COND_E),
               (X86cmp (loadi64 addr:$src), (i64 0))),
             (TZCNT64rm addr:$src)>;
-  def : Pat<(X86cmov (i16 16), (cttz (loadi16 addr:$src)), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i16 16), (cttz (loadi16 addr:$src)), (X86_COND_NE),
               (X86cmp (loadi16 addr:$src), (i16 0))),
             (TZCNT16rm addr:$src)>;
-  def : Pat<(X86cmov (i32 32), (cttz (loadi32 addr:$src)), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i32 32), (cttz (loadi32 addr:$src)), (X86_COND_NE),
               (X86cmp (loadi32 addr:$src), (i32 0))),
             (TZCNT32rm addr:$src)>;
-  def : Pat<(X86cmov (i64 64), (cttz (loadi64 addr:$src)), (X86_COND_E_OR_NE),
+  def : Pat<(X86cmov (i64 64), (cttz (loadi64 addr:$src)), (X86_COND_NE),
               (X86cmp (loadi64 addr:$src), (i64 0))),
             (TZCNT64rm addr:$src)>;
 }

diff --git a/test/CodeGen/X86/lzcnt-tzcnt.ll b/test/CodeGen/X86/lzcnt-tzcnt.ll
index aa9ae2b..76e7429 100644 (file)
--- a/test/CodeGen/X86/lzcnt-tzcnt.ll
+++ b/test/CodeGen/X86/lzcnt-tzcnt.ll
@@ -72,39 +72,6 @@ define i64 @test6_ctlz(i64 %v) {
 ; CHECK-NEXT: ret
 
 
-define i16 @test7_ctlz(i16 %v) {
-  %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true)
-  %tobool = icmp eq i16 0, %v
-  %cond = select i1 %tobool, i16 %cnt, i16 16
-  ret i16 %cond
-}
-; CHECK-LABEL: test7_ctlz
-; CHECK: lzcnt
-; CHECK-NEXT: ret
-
-
-define i32 @test8_ctlz(i32 %v) {
-  %cnt = tail call i32 @llvm.ctlz.i32(i32 %v, i1 true)
-  %tobool = icmp eq i32 0, %v
-  %cond = select i1 %tobool, i32 %cnt, i32 32
-  ret i32 %cond
-}
-; CHECK-LABEL: test8_ctlz
-; CHECK: lzcnt
-; CHECK-NEXT: ret
-
-
-define i64 @test9_ctlz(i64 %v) {
-  %cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true)
-  %tobool = icmp eq i64 0, %v
-  %cond = select i1 %tobool, i64 %cnt, i64 64
-  ret i64 %cond
-}
-; CHECK-LABEL: test9_ctlz
-; CHECK: lzcnt
-; CHECK-NEXT: ret
-
-
 define i16 @test10_ctlz(i16* %ptr) {
   %v = load i16, i16* %ptr
   %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true)
@@ -183,45 +150,6 @@ define i64 @test15_ctlz(i64* %ptr) {
 ; CHECK-NEXT: ret
 
 
-define i16 @test16_ctlz(i16* %ptr) {
-  %v = load i16, i16* %ptr
-  %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true)
-  %tobool = icmp eq i16 0, %v
-  %cond = select i1 %tobool, i16 %cnt, i16 16
-  ret i16 %cond
-}
-; CHECK-LABEL: test16_ctlz
-; CHECK-NOT: movw
-; CHECK: lzcnt
-; CHECK-NEXT: ret
-
-
-define i32 @test17_ctlz(i32* %ptr) {
-  %v = load i32, i32* %ptr
-  %cnt = tail call i32 @llvm.ctlz.i32(i32 %v, i1 true)
-  %tobool = icmp eq i32 0, %v
-  %cond = select i1 %tobool, i32 %cnt, i32 32
-  ret i32 %cond
-}
-; CHECK-LABEL: test17_ctlz
-; CHECK-NOT: movd
-; CHECK: lzcnt
-; CHECK-NEXT: ret
-
-
-define i64 @test18_ctlz(i64* %ptr) {
-  %v = load i64, i64* %ptr
-  %cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true)
-  %tobool = icmp eq i64 0, %v
-  %cond = select i1 %tobool, i64 %cnt, i64 64
-  ret i64 %cond
-}
-; CHECK-LABEL: test18_ctlz
-; CHECK-NOT: movq
-; CHECK: lzcnt
-; CHECK-NEXT: ret
-
-
 define i16 @test1_cttz(i16 %v) {
   %cnt = tail call i16 @llvm.cttz.i16(i16 %v, i1 true)
   %tobool = icmp eq i16 %v, 0
@@ -288,39 +216,6 @@ define i64 @test6_cttz(i64 %v) {
 ; CHECK-NEXT: ret
 
 
-define i16 @test7_cttz(i16 %v) {
-  %cnt = tail call i16 @llvm.cttz.i16(i16 %v, i1 true)
-  %tobool = icmp eq i16 0, %v
-  %cond = select i1 %tobool, i16 %cnt, i16 16
-  ret i16 %cond
-}
-; CHECK-LABEL: test7_cttz
-; CHECK: tzcnt
-; CHECK-NEXT: ret
-
-
-define i32 @test8_cttz(i32 %v) {
-  %cnt = tail call i32 @llvm.cttz.i32(i32 %v, i1 true)
-  %tobool = icmp eq i32 0, %v
-  %cond = select i1 %tobool, i32 %cnt, i32 32
-  ret i32 %cond
-}
-; CHECK-LABEL: test8_cttz
-; CHECK: tzcnt
-; CHECK-NEXT: ret
-
-
-define i64 @test9_cttz(i64 %v) {
-  %cnt = tail call i64 @llvm.cttz.i64(i64 %v, i1 true)
-  %tobool = icmp eq i64 0, %v
-  %cond = select i1 %tobool, i64 %cnt, i64 64
-  ret i64 %cond
-}
-; CHECK-LABEL: test9_cttz
-; CHECK: tzcnt
-; CHECK-NEXT: ret
-
-
 define i16 @test10_cttz(i16* %ptr) {
   %v = load i16, i16* %ptr
   %cnt = tail call i16 @llvm.cttz.i16(i16 %v, i1 true)
@@ -399,77 +294,6 @@ define i64 @test15_cttz(i64* %ptr) {
 ; CHECK-NEXT: ret
 
 
-define i16 @test16_cttz(i16* %ptr) {
-  %v = load i16, i16* %ptr
-  %cnt = tail call i16 @llvm.cttz.i16(i16 %v, i1 true)
-  %tobool = icmp eq i16 0, %v
-  %cond = select i1 %tobool, i16 %cnt, i16 16
-  ret i16 %cond
-}
-; CHECK-LABEL: test16_cttz
-; CHECK-NOT: movw
-; CHECK: tzcnt
-; CHECK-NEXT: ret
-
-
-define i32 @test17_cttz(i32* %ptr) {
-  %v = load i32, i32* %ptr
-  %cnt = tail call i32 @llvm.cttz.i32(i32 %v, i1 true)
-  %tobool = icmp eq i32 0, %v
-  %cond = select i1 %tobool, i32 %cnt, i32 32
-  ret i32 %cond
-}
-; CHECK-LABEL: test17_cttz
-; CHECK-NOT: movd
-; CHECK: tzcnt
-; CHECK-NEXT: ret
-
-
-define i64 @test18_cttz(i64* %ptr) {
-  %v = load i64, i64* %ptr
-  %cnt = tail call i64 @llvm.cttz.i64(i64 %v, i1 true)
-  %tobool = icmp eq i64 0, %v
-  %cond = select i1 %tobool, i64 %cnt, i64 64
-  ret i64 %cond
-}
-; CHECK-LABEL: test18_cttz
-; CHECK-NOT: movq
-; CHECK: tzcnt
-; CHECK-NEXT: ret
-
-define i16 @test1b_ctlz(i16 %v) {
-  %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true)
-  %tobool = icmp ne i16 %v, 0
-  %cond = select i1 %tobool, i16 16, i16 %cnt
-  ret i16 %cond
-}
-; CHECK-LABEL: test1b_ctlz
-; CHECK: lzcnt
-; CHECK-NEXT: ret
-
-
-define i32 @test2b_ctlz(i32 %v) {
-  %cnt = tail call i32 @llvm.ctlz.i32(i32 %v, i1 true)
-  %tobool = icmp ne i32 %v, 0
-  %cond = select i1 %tobool, i32 32, i32 %cnt
-  ret i32 %cond
-}
-; CHECK-LABEL: test2b_ctlz
-; CHECK: lzcnt
-; CHECK-NEXT: ret
-
-
-define i64 @test3b_ctlz(i64 %v) {
-  %cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true)
-  %tobool = icmp ne i64 %v, 0
-  %cond = select i1 %tobool, i64 64, i64 %cnt
-  ret i64 %cond
-}
-; CHECK-LABEL: test3b_ctlz
-; CHECK: lzcnt
-; CHECK-NEXT: ret
-
-
 define i16 @test4b_ctlz(i16 %v) {
   %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true)
   %tobool = icmp ne i16 %v, 0
@@ -503,39 +327,6 @@ define i64 @test6b_ctlz(i64 %v) {
 ; CHECK-NEXT: ret
 
 
-define i16 @test1b_cttz(i16 %v) {
-  %cnt = tail call i16 @llvm.cttz.i16(i16 %v, i1 true)
-  %tobool = icmp ne i16 %v, 0
-  %cond = select i1 %tobool, i16 16, i16 %cnt
-  ret i16 %cond
-}
-; CHECK-LABEL: test1b_cttz
-; CHECK: tzcnt
-; CHECK-NEXT: ret
-
-
-define i32 @test2b_cttz(i32 %v) {
-  %cnt = tail call i32 @llvm.cttz.i32(i32 %v, i1 true)
-  %tobool = icmp ne i32 %v, 0
-  %cond = select i1 %tobool, i32 32, i32 %cnt
-  ret i32 %cond
-}
-; CHECK-LABEL: test2b_cttz
-; CHECK: tzcnt
-; CHECK-NEXT: ret
-
-
-define i64 @test3b_cttz(i64 %v) {
-  %cnt = tail call i64 @llvm.cttz.i64(i64 %v, i1 true)
-  %tobool = icmp ne i64 %v, 0
-  %cond = select i1 %tobool, i64 64, i64 %cnt
-  ret i64 %cond
-}
-; CHECK-LABEL: test3b_cttz
-; CHECK: tzcnt
-; CHECK-NEXT: ret
-
-
 define i16 @test4b_cttz(i16 %v) {
   %cnt = tail call i16 @llvm.cttz.i16(i16 %v, i1 true)
   %tobool = icmp ne i16 %v, 0