EVT VT = N->getValueType(0);
SDLoc dl(N);
+ // Only handle sext/aext for now.
+ if (N->getOpcode() != ISD::SIGN_EXTEND && N->getOpcode() != ISD::ANY_EXTEND)
+ return SDValue();
+
// Only do this combine with AVX512 for vector extends.
if (!Subtarget.hasAVX512() || !VT.isVector() || N0->getOpcode() != ISD::SETCC)
return SDValue();
if (SDValue NewCMov = combineToExtendCMOV(N, DAG))
return NewCMov;
+ if (DCI.isBeforeLegalizeOps())
+ if (SDValue V = combineExtSetcc(N, DAG, Subtarget))
+ return V;
+
if (SDValue V = combineToExtendVectorInReg(N, DAG, DCI, Subtarget))
return V;
declare <4 x i1> @func4xi1(<4 x i1> %a)
define <4 x i32> @test7(<4 x i32>%a, <4 x i32>%b) {
-; KNL-LABEL: test7:
-; KNL: ## %bb.0:
-; KNL-NEXT: pushq %rax
-; KNL-NEXT: .cfi_def_cfa_offset 16
-; KNL-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
-; KNL-NEXT: callq _func4xi1
-; KNL-NEXT: vpslld $31, %xmm0, %xmm0
-; KNL-NEXT: vpsrad $31, %xmm0, %xmm0
-; KNL-NEXT: popq %rax
-; KNL-NEXT: retq
-;
-; SKX-LABEL: test7:
-; SKX: ## %bb.0:
-; SKX-NEXT: pushq %rax
-; SKX-NEXT: .cfi_def_cfa_offset 16
-; SKX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0
-; SKX-NEXT: vpmovm2d %k0, %xmm0
-; SKX-NEXT: callq _func4xi1
-; SKX-NEXT: vpslld $31, %xmm0, %xmm0
-; SKX-NEXT: vpsrad $31, %xmm0, %xmm0
-; SKX-NEXT: popq %rax
-; SKX-NEXT: retq
+; ALL_X64-LABEL: test7:
+; ALL_X64: ## %bb.0:
+; ALL_X64-NEXT: pushq %rax
+; ALL_X64-NEXT: .cfi_def_cfa_offset 16
+; ALL_X64-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
+; ALL_X64-NEXT: callq _func4xi1
+; ALL_X64-NEXT: vpslld $31, %xmm0, %xmm0
+; ALL_X64-NEXT: vpsrad $31, %xmm0, %xmm0
+; ALL_X64-NEXT: popq %rax
+; ALL_X64-NEXT: retq
;
; KNL_X32-LABEL: test7:
; KNL_X32: ## %bb.0: