drm/amd/display: rename _lvp to l_vp

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index 16559f7..e7a8ac7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -937,7 +937,7 @@ static unsigned int CalculateVMAndRowBytes(
                *MetaRowByte = 0;
        }
 
-       if (SurfaceTiling == dm_sw_linear || SurfaceTiling == dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_lvp) {
+       if (SurfaceTiling == dm_sw_linear || SurfaceTiling == dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) {
                MacroTileSizeBytes = 256;
                MacroTileHeight = BlockHeight256Bytes;
        } else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling == dm_sw_4kb_s_x
@@ -3348,7 +3348,7 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
                                                                                == dm_420_10))
                                || (((mode_lib->vba.SurfaceTiling[k] == dm_sw_gfx7_2d_thin_gl
                                                || mode_lib->vba.SurfaceTiling[k]
-                                                               == dm_sw_gfx7_2d_thin_lvp)
+                                                               == dm_sw_gfx7_2d_thin_l_vp)
                                                && !((mode_lib->vba.SourcePixelFormat[k]
                                                                == dm_444_64
                                                                || mode_lib->vba.SourcePixelFormat[k]

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index d6fedae..22f3b5a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -997,7 +997,7 @@ static unsigned int CalculateVMAndRowBytes(
                *MetaRowByte = 0;
        }
 
-       if (SurfaceTiling == dm_sw_linear || SurfaceTiling == dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_lvp) {
+       if (SurfaceTiling == dm_sw_linear || SurfaceTiling == dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) {
                MacroTileSizeBytes = 256;
                MacroTileHeight = BlockHeight256Bytes;
        } else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling == dm_sw_4kb_s_x
@@ -3385,7 +3385,7 @@ void dml20v2_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode
                                                                                == dm_420_10))
                                || (((mode_lib->vba.SurfaceTiling[k] == dm_sw_gfx7_2d_thin_gl
                                                || mode_lib->vba.SurfaceTiling[k]
-                                                               == dm_sw_gfx7_2d_thin_lvp)
+                                                               == dm_sw_gfx7_2d_thin_l_vp)
                                                && !((mode_lib->vba.SourcePixelFormat[k]
                                                                == dm_444_64
                                                                || mode_lib->vba.SourcePixelFormat[k]

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
index 5dcfbb0..af35b3b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
@@ -1338,7 +1338,7 @@ static unsigned int CalculateVMAndRowBytes(
                *MetaRowByte = 0;
        }
 
-       if (SurfaceTiling == dm_sw_linear || SurfaceTiling == dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_lvp) {
+       if (SurfaceTiling == dm_sw_linear || SurfaceTiling == dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) {
                MacroTileSizeBytes = 256;
                MacroTileHeight = BlockHeight256Bytes;
        } else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling == dm_sw_4kb_s_x
@@ -3453,7 +3453,7 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
                                                                                == dm_420_10))
                                || (((mode_lib->vba.SurfaceTiling[k] == dm_sw_gfx7_2d_thin_gl
                                                || mode_lib->vba.SurfaceTiling[k]
-                                                               == dm_sw_gfx7_2d_thin_lvp)
+                                                               == dm_sw_gfx7_2d_thin_l_vp)
                                                && !((mode_lib->vba.SourcePixelFormat[k]
                                                                == dm_444_64
                                                                || mode_lib->vba.SourcePixelFormat[k]

diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h
index 658e073..bfc2f39 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h
@@ -85,7 +85,7 @@ enum dm_swizzle_mode {
        dm_sw_var_s_x = 29,
        dm_sw_var_d_x = 30,
        dm_sw_64kb_r_x,
-       dm_sw_gfx7_2d_thin_lvp,
+       dm_sw_gfx7_2d_thin_l_vp,
        dm_sw_gfx7_2d_thin_gl,
 };
 enum lb_depth {