OSDN Git Service

i965: Determine size of double precision float register
authorTopi Pohjolainen <topi.pohjolainen@intel.com>
Wed, 3 Sep 2014 17:10:30 +0000 (20:10 +0300)
committerSamuel Iglesias Gonsálvez <siglesias@igalia.com>
Tue, 10 May 2016 09:25:02 +0000 (11:25 +0200)
This is used to determine how many registers an instruction reads and
writes as well as for offseting register region into a desired component.

v2 (Connor): rebase on master

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Signed-off-by: Tapani P\344lli <tapani.palli@intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
src/mesa/drivers/dri/i965/brw_reg.h

index 4f9b252..b84c709 100644 (file)
@@ -274,6 +274,7 @@ type_sz(unsigned type)
    switch(type) {
    case BRW_REGISTER_TYPE_UQ:
    case BRW_REGISTER_TYPE_Q:
+   case BRW_REGISTER_TYPE_DF:
       return 8;
    case BRW_REGISTER_TYPE_UD:
    case BRW_REGISTER_TYPE_D: