* See the COPYING file in the top-level directory.
*/
-#ifndef TCG_CPUS_ICOUNT_H
-#define TCG_CPUS_ICOUNT_H
+#ifndef TCG_ACCEL_OPS_ICOUNT_H
+#define TCG_ACCEL_OPS_ICOUNT_H
void icount_handle_deadline(void);
void icount_prepare_for_run(CPUState *cpu);
void icount_handle_interrupt(CPUState *cpu, int mask);
-#endif /* TCG_CPUS_ICOUNT_H */
+#endif /* TCG_ACCEL_OPS_ICOUNT_H */
* See the COPYING file in the top-level directory.
*/
-#ifndef TCG_CPUS_MTTCG_H
-#define TCG_CPUS_MTTCG_H
+#ifndef TCG_ACCEL_OPS_MTTCG_H
+#define TCG_ACCEL_OPS_MTTCG_H
/* kick MTTCG vCPU thread */
void mttcg_kick_vcpu_thread(CPUState *cpu);
/* start an mttcg vCPU thread */
void mttcg_start_vcpu_thread(CPUState *cpu);
-#endif /* TCG_CPUS_MTTCG_H */
+#endif /* TCG_ACCEL_OPS_MTTCG_H */
* See the COPYING file in the top-level directory.
*/
-#ifndef TCG_CPUS_RR_H
-#define TCG_CPUS_RR_H
+#ifndef TCG_ACCEL_OPS_RR_H
+#define TCG_ACCEL_OPS_RR_H
#define TCG_KICK_PERIOD (NANOSECONDS_PER_SECOND / 10)
/* start the round robin vcpu thread */
void rr_start_vcpu_thread(CPUState *cpu);
-#endif /* TCG_CPUS_RR_H */
+#endif /* TCG_ACCEL_OPS_RR_H */
* See the COPYING file in the top-level directory.
*/
-#ifndef TCG_CPUS_H
-#define TCG_CPUS_H
+#ifndef TCG_ACCEL_OPS_H
+#define TCG_ACCEL_OPS_H
#include "sysemu/cpus.h"
void tcg_handle_interrupt(CPUState *cpu, int mask);
void tcg_cpu_init_cflags(CPUState *cpu, bool parallel);
-#endif /* TCG_CPUS_H */
+#endif /* TCG_ACCEL_OPS_H */
* THE SOFTWARE.
*/
-#ifndef BLOCK_COROUTINES_INT_H
-#define BLOCK_COROUTINES_INT_H
+#ifndef BLOCK_COROUTINES_H
+#define BLOCK_COROUTINES_H
#include "block/block_int.h"
int generated_co_wrapper blk_do_flush(BlockBackend *blk);
-#endif /* BLOCK_COROUTINES_INT_H */
+#endif /* BLOCK_COROUTINES_H */
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef _TARGET_ARCH_SYSCALL_H_
-#define _TARGET_ARCH_SYSCALL_H_
+#ifndef ARM_TARGET_SYSCALL_H
+#define ARM_TARGET_SYSCALL_H
struct target_pt_regs {
abi_long uregs[17];
#define TARGET_HW_MACHINE "arm"
#define TARGET_HW_MACHINE_ARCH "armv7"
-#endif /* !_TARGET_ARCH_SYSCALL_H_ */
+#endif /* ARM_TARGET_SYSCALL_H */
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef TARGET_ARCH_H
-#define TARGET_ARCH_H
+#ifndef TARGET_H
+#define TARGET_H
/*
* i386 doesn't 'lump' the registers for 64-bit args.
return false;
}
-#endif /* ! TARGET_ARCH_H */
-
+#endif /* TARGET_H */
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef BSD_USER_ARCH_SYSARCH_H_
-#define BSD_USER_ARCH_SYSARCH_H_
+#ifndef TARGET_ARCH_SYSARCH_H
+#define TARGET_ARCH_SYSARCH_H
#include "target_syscall.h"
TARGET_ABI_FMT_lx ")", name->name, (int)arg1, arg2, arg3, arg4);
}
-#endif /* !BSD_USER_ARCH_SYSARCH_H_ */
+#endif /* TARGET_ARCH_SYSARCH_H */
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef BSD_USER_ARCH_SYSARCH_H_
-#define BSD_USER_ARCH_SYSARCH_H_
+#ifndef TARGET_ARCH_SYSARCH_H
+#define TARGET_ARCH_SYSARCH_H
#include "target_syscall.h"
TARGET_ABI_FMT_lx ")", name->name, (int)arg1, arg2, arg3, arg4);
}
-#endif /*! BSD_USER_ARCH_SYSARCH_H_ */
+#endif /* TARGET_ARCH_SYSARCH_H */
* SPDX-License-Identifier: MIT
*/
-#ifndef HW_I386_E820_H
-#define HW_I386_E820_H
+#ifndef HW_I386_E820_MEMORY_LAYOUT_H
+#define HW_I386_E820_MEMORY_LAYOUT_H
/* e820 types */
#define E820_RAM 1
/* This file is autogenerated, DO NOT EDIT! */
-#ifndef __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__
-#define __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__
+#ifndef HW_CAN_CTU_CAN_FD_FRAME_H
+#define HW_CAN_CTU_CAN_FD_FRAME_H
/* CAN_Frame_format memory map */
enum ctu_can_fd_can_frame_format {
/* This file is autogenerated, DO NOT EDIT! */
-#ifndef __CTU_CAN_FD_CAN_FD_REGISTER_MAP__
-#define __CTU_CAN_FD_CAN_FD_REGISTER_MAP__
+#ifndef HW_CAN_CTU_CAN_FD_REGS_H
+#define HW_CAN_CTU_CAN_FD_REGS_H
/* CAN_Registers memory map */
enum ctu_can_fd_can_registers {
* This code is licensed under the GNU GPL v2 or later.
*/
-#ifndef HW_NVME_INTERNAL_H
-#define HW_NVME_INTERNAL_H
+#ifndef HW_NVME_NVME_H
+#define HW_NVME_NVME_H
#include "qemu/uuid.h"
#include "hw/pci/pci.h"
uint16_t nvme_map_dptr(NvmeCtrl *n, NvmeSg *sg, size_t len,
NvmeCmd *cmd);
-#endif /* HW_NVME_INTERNAL_H */
+#endif /* HW_NVME_NVME_H */
* GNU General Public License for more details.
*/
-#ifndef HW_USB_DWC2_H
-#define HW_USB_DWC2_H
+#ifndef HW_USB_HCD_DWC2_H
+#define HW_USB_HCD_DWC2_H
#include "qemu/timer.h"
#include "hw/irq.h"
* the COPYING file in the top-level directory.
*/
-#ifndef BLOCK_HMP_COMMANDS_H
-#define BLOCK_HMP_COMMANDS_H
+#ifndef BLOCK_BLOCK_HMP_CMDS_H
+#define BLOCK_BLOCK_HMP_CMDS_H
void hmp_drive_add(Monitor *mon, const QDict *qdict);
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef QCRYPTO_TLSCIPHERSUITES_H
-#define QCRYPTO_TLSCIPHERSUITES_H
+#ifndef QCRYPTO_TLS_CIPHER_SUITES_H
+#define QCRYPTO_TLS_CIPHER_SUITES_H
#include "qom/object.h"
#include "crypto/tlscreds.h"
GByteArray *qcrypto_tls_cipher_suites_get_data(QCryptoTLSCipherSuites *obj,
Error **errp);
-#endif /* QCRYPTO_TLSCIPHERSUITES_H */
+#endif /* QCRYPTO_TLS_CIPHER_SUITES_H */
*
*/
-#ifndef HW_ACPI_GED_H
-#define HW_ACPI_GED_H
+#ifndef HW_ACPI_GENERIC_EVENT_DEVICE_H
+#define HW_ACPI_GENERIC_EVENT_DEVICE_H
#include "hw/sysbus.h"
#include "hw/acpi/memory_hotplug.h"
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef HW_I2C_ARM_SBCON_H
-#define HW_I2C_ARM_SBCON_H
+
+#ifndef HW_I2C_ARM_SBCON_I2C_H
+#define HW_I2C_ARM_SBCON_I2C_H
#include "hw/sysbus.h"
#include "hw/i2c/bitbang_i2c.h"
int in;
};
-#endif /* HW_I2C_ARM_SBCON_H */
+#endif /* HW_I2C_ARM_SBCON_I2C_H */
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef HW_MISC_CPRMAN_H
-#define HW_MISC_CPRMAN_H
+#ifndef HW_MISC_BCM2835_CPRMAN_H
+#define HW_MISC_BCM2835_CPRMAN_H
#include "hw/sysbus.h"
#include "hw/qdev-clock.h"
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef HW_MISC_CPRMAN_INTERNALS_H
-#define HW_MISC_CPRMAN_INTERNALS_H
+#ifndef HW_MISC_BCM2835_CPRMAN_INTERNALS_H
+#define HW_MISC_BCM2835_CPRMAN_INTERNALS_H
#include "hw/registerfields.h"
#include "hw/misc/bcm2835_cprman.h"
* THE SOFTWARE.
*/
-#ifndef HW_STM_EXTI_H
-#define HW_STM_EXTI_H
+#ifndef HW_STM32F4XX_EXTI_H
+#define HW_STM32F4XX_EXTI_H
#include "hw/sysbus.h"
#include "qom/object.h"
* THE SOFTWARE.
*/
-#ifndef HW_STM_SYSCFG_H
-#define HW_STM_SYSCFG_H
+#ifndef HW_STM32F4XX_SYSCFG_H
+#define HW_STM32F4XX_SYSCFG_H
#include "hw/sysbus.h"
#include "qom/object.h"
* 1: OSPI direct access mode.
*/
-#ifndef XILINX_VERSAL_PMC_IOU_SLCR_H
-#define XILINX_VERSAL_PMC_IOU_SLCR_H
+#ifndef XLNX_VERSAL_PMC_IOU_SLCR_H
+#define XLNX_VERSAL_PMC_IOU_SLCR_H
#include "hw/register.h"
RegisterInfo regs_info[XILINX_VERSAL_PMC_IOU_SLCR_R_MAX];
};
-#endif /* XILINX_VERSAL_PMC_IOU_SLCR_H */
+#endif /* XLNX_VERSAL_PMC_IOU_SLCR_H */
*
* Copyright (c) 2008-2021 QEMU contributors
*/
-#ifndef HW_NET_MV88W8618_H
-#define HW_NET_MV88W8618_H
+
+#ifndef HW_NET_MV88W8618_ETH_H
+#define HW_NET_MV88W8618_ETH_H
#define TYPE_MV88W8618_ETH "mv88w8618_eth"
*
*/
-#ifndef HW_NUBUS_MAC_H
-#define HW_NUBUS_MAC_H
+#ifndef HW_NUBUS_MAC_NUBUS_BRIDGE_H
+#define HW_NUBUS_MAC_NUBUS_BRIDGE_H
#include "hw/nubus/nubus.h"
#include "qom/object.h"
*
*/
-#ifndef REMOTE_PCIHOST_H
-#define REMOTE_PCIHOST_H
+#ifndef PCI_HOST_REMOTE_H
+#define PCI_HOST_REMOTE_H
#include "exec/memory.h"
#include "hw/pci/pcie_host.h"
*
* Based on include/sbi/{fw_dynamic.h,sbi_scratch.h} from the OpenSBI project.
*/
-#ifndef OPENSBI_H
-#define OPENSBI_H
+
+#ifndef RISCV_BOOT_OPENSBI_H
+#define RISCV_BOOT_OPENSBI_H
/** Expected value of info magic ('OSBI' ascii string in hex) */
#define FW_DYNAMIC_INFO_MAGIC_VALUE 0x4942534f
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef HW_SHAKTI_H
-#define HW_SHAKTI_H
+#ifndef HW_SHAKTI_C_H
+#define HW_SHAKTI_C_H
#include "hw/riscv/riscv_hart.h"
#include "hw/boards.h"
* version.
*/
-#ifndef HW_RTC_SUN4V
-#define HW_RTC_SUN4V
+#ifndef HW_RTC_SUN4V_RTC_H
+#define HW_RTC_SUN4V_RTC_H
#include "exec/hwaddr.h"
* THE SOFTWARE.
*/
-#ifndef HW_RTC_XLNX_ZYNQMP_H
-#define HW_RTC_XLNX_ZYNQMP_H
+#ifndef HW_RTC_XLNX_ZYNQMP_RTC_H
+#define HW_RTC_XLNX_ZYNQMP_RTC_H
#include "hw/register.h"
#include "hw/sysbus.h"
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef HW_RX_RX62N_MCU_H
-#define HW_RX_RX62N_MCU_H
+#ifndef HW_RX_RX62N_H
+#define HW_RX_RX62N_H
#include "target/rx/cpu.h"
#include "hw/intc/rx_icu.h"
* later. See the COPYING file in the top-level directory.
*/
-#ifndef TMP105_REGS_H
-#define TMP105_REGS_H
+#ifndef EMC141X_REGS_H
+#define EMC141X_REGS_H
#define EMC1413_DEVICE_ID 0x21
#define EMC1414_DEVICE_ID 0x25
* + Property "indac-write-disabled": Disable indirect access writes.
*/
-#ifndef XILINX_VERSAL_OSPI_H
-#define XILINX_VERSAL_OSPI_H
+#ifndef XLNX_VERSAL_OSPI_H
+#define XLNX_VERSAL_OSPI_H
#include "hw/register.h"
#include "hw/ssi/ssi.h"
uint8_t stig_membank[512];
};
-#endif /* XILINX_VERSAL_OSPI_H */
+#endif /* XLNX_VERSAL_OSPI_H */
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef BCM2835_SYSTIMER_H
-#define BCM2835_SYSTIMER_H
+#ifndef BCM2835_SYSTMR_H
+#define BCM2835_SYSTMR_H
#include "hw/sysbus.h"
#include "hw/irq.h"
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-
-#ifndef HW_TRICORE_TESTDEV_H
-#define HW_TRICORE_TESTDEV_H
+#ifndef HW_TRICORE_TESTDEVICE_H
+#define HW_TRICORE_TESTDEVICE_H
#include "hw/sysbus.h"
#include "hw/hw.h"
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef DWC2_HW_H
-#define DWC2_HW_H
+#ifndef DWC2_REGS_H
+#define DWC2_REGS_H
#define HSOTG_REG(x) (x)
#define MAX_DMA_DESC_NUM_GENERIC 64
#define MAX_DMA_DESC_NUM_HS_ISOC 256
-#endif /* __DWC2_HW_H__ */
+#endif /* DWC2_REGS_H */
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef HW_USB_MUSB_H
-#define HW_USB_MUSB_H
+#ifndef HW_USB_HCD_MUSB_H
+#define HW_USB_HCD_MUSB_H
enum musb_irq_source_e {
musb_irq_suspend = 0,
* THE SOFTWARE.
*/
-#ifndef XLNX_VERSAL_USB_SUBSYSTEM_H
-#define XLNX_VERSAL_USB_SUBSYSTEM_H
+#ifndef XLNX_USB_SUBSYSTEM_H
+#define XLNX_USB_SUBSYSTEM_H
#include "hw/usb/xlnx-versal-usb2-ctrl-regs.h"
#include "hw/usb/hcd-dwc3.h"
* THE SOFTWARE.
*/
-#ifndef XLNX_USB2_REGS_H
-#define XLNX_USB2_REGS_H
+#ifndef XLNX_VERSAL_USB2_CTRL_REGS_H
+#define XLNX_VERSAL_USB2_CTRL_REGS_H
#define TYPE_XILINX_VERSAL_USB2_CTRL_REGS "xlnx.versal-usb2-ctrl-regs"
* See the COPYING file in the top-level directory.
*/
-#ifndef IMX2_WDT_H
-#define IMX2_WDT_H
+#ifndef WDT_IMX2_H
+#define WDT_IMX2_H
#include "qemu/bitops.h"
#include "hw/sysbus.h"
bool wcr_wdt_locked; /* affects WDT (never cleared) */
};
-#endif /* IMX2_WDT_H */
+#endif /* WDT_IMX2_H */
-#ifndef QEMU_COMMON_H
-#define QEMU_COMMON_H
+#ifndef QEMU_HELP_TEXTS_H
+#define QEMU_HELP_TEXTS_H
/* Copyright string for -version arguments, About dialogs, etc */
#define QEMU_COPYRIGHT "Copyright (c) 2003-2022 " \
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef QEMU_PLUGIN_API_H
-#define QEMU_PLUGIN_API_H
+
+#ifndef QEMU_QEMU_PLUGIN_H
+#define QEMU_QEMU_PLUGIN_H
#include <inttypes.h>
#include <stdbool.h>
*/
uint64_t qemu_plugin_entry_code(void);
-#endif /* QEMU_PLUGIN_API_H */
+#endif /* QEMU_QEMU_PLUGIN_H */
* or later. See the COPYING.LIB file in the top-level directory.
*/
-#ifndef BLOCK_BACKEND_GS_H
-#define BLOCK_BACKEND_GS_H
+#ifndef BLOCK_BACKEND_GLOBAL_STATE_H
+#define BLOCK_BACKEND_GLOBAL_STATE_H
#include "block-backend-common.h"
int blk_make_empty(BlockBackend *blk, Error **errp);
-#endif /* BLOCK_BACKEND_GS_H */
+#endif /* BLOCK_BACKEND_GLOBAL_STATE_H */
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef PLUGIN_INTERNAL_H
-#define PLUGIN_INTERNAL_H
+#ifndef PLUGIN_H
+#define PLUGIN_H
#include <gmodule.h>
#include "qemu/qht.h"
void exec_inline_op(struct qemu_plugin_dyn_cb *cb);
-#endif /* _PLUGIN_INTERNAL_H_ */
+#endif /* PLUGIN_H */
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef TARGET_ARM_TRANSLATE_A64_H
-#define TARGET_ARM_TRANSLATE_A64_H
+#ifndef TARGET_ARM_TRANSLATE_A32_H
+#define TARGET_ARM_TRANSLATE_A32_H
/* Prototypes for autogenerated disassembler functions */
bool disas_m_nocp(DisasContext *dc, uint32_t insn);
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef TARGET_ARM_VEC_INTERNALS_H
-#define TARGET_ARM_VEC_INTERNALS_H
+#ifndef TARGET_ARM_VEC_INTERNAL_H
+#define TARGET_ARM_VEC_INTERNAL_H
/*
* Note that vector data is stored in host-endian 64-bit chunks,
*/
uint64_t pmull_w(uint64_t op1, uint64_t op2);
-#endif /* TARGET_ARM_VEC_INTERNALS_H */
+#endif /* TARGET_ARM_VEC_INTERNAL_H */
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
-#ifndef QEMU_AVR_QOM_H
-#define QEMU_AVR_QOM_H
+#ifndef TARGET_AVR_CPU_QOM_H
+#define TARGET_AVR_CPU_QOM_H
#include "hw/core/cpu.h"
#include "qom/object.h"
};
-#endif /* !defined (QEMU_AVR_CPU_QOM_H) */
+#endif /* TARGET_AVR_CPU_QOM_H */
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef HEXAGON_ARCH_TYPES_H
-#define HEXAGON_ARCH_TYPES_H
+#ifndef HEXAGON_HEX_ARCH_TYPES_H
+#define HEXAGON_HEX_ARCH_TYPES_H
#include "qemu/osdep.h"
#include "mmvec/mmvec.h"
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef HEXAGON_REGS_H
-#define HEXAGON_REGS_H
+#ifndef HEXAGON_HEX_REGS_H
+#define HEXAGON_HEX_REGS_H
enum {
HEX_REG_R00 = 0,
* See the COPYING file in the top-level directory.
*/
-#ifndef HAX_CPUS_H
-#define HAX_CPUS_H
+#ifndef TARGET_I386_HAX_ACCEL_OPS_H
+#define TARGET_I386_HAX_ACCEL_OPS_H
#include "sysemu/cpus.h"
void hax_raise_event(CPUState *cpu);
void hax_reset_vcpu_state(void *opaque);
-#endif /* HAX_CPUS_H */
+#endif /* TARGET_I386_HAX_ACCEL_OPS_H */
* See the COPYING file in the top-level directory.
*/
-#ifndef NVMM_CPUS_H
-#define NVMM_CPUS_H
+#ifndef TARGET_I386_NVMM_ACCEL_OPS_H
+#define TARGET_I386_NVMM_ACCEL_OPS_H
#include "sysemu/cpus.h"
void nvmm_cpu_synchronize_post_init(CPUState *cpu);
void nvmm_cpu_synchronize_pre_loadvm(CPUState *cpu);
-#endif /* NVMM_CPUS_H */
+#endif /* TARGET_I386_NVMM_ACCEL_OPS_H */
*
*/
-#ifndef QEMU_SEV_I386_H
-#define QEMU_SEV_I386_H
+#ifndef I386_SEV_H
+#define I386_SEV_H
#ifndef CONFIG_USER_ONLY
#include CONFIG_DEVICES /* CONFIG_SEV */
* See the COPYING file in the top-level directory.
*/
-#ifndef WHPX_CPUS_H
-#define WHPX_CPUS_H
+#ifndef TARGET_I386_WHPX_ACCEL_OPS_H
+#define TARGET_I386_WHPX_ACCEL_OPS_H
#include "sysemu/cpus.h"
/* full state set, modified during initialization or on vmload */
#define WHPX_SET_FULL_STATE 3
-#endif /* WHPX_CPUS_H */
+#endif /* TARGET_I386_WHPX_ACCEL_OPS_H */
-#ifndef WHP_INTERNAL_H
-#define WHP_INTERNAL_H
+#ifndef TARGET_I386_WHPX_INTERNAL_H
+#define TARGET_I386_WHPX_INTERNAL_H
#include <windows.h>
#include <WinHvPlatform.h>
WINHV_PLATFORM_FNS_SUPPLEMENTAL
} WHPFunctionList;
-#endif /* WHP_INTERNAL_H */
+#endif /* TARGET_I386_WHPX_INTERNAL_H */
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
-#ifndef XTENSA_CORE_CONFIGURATION_H_
-#define XTENSA_CORE_CONFIGURATION_H_
+#ifndef XTENSA_CORE_DE233_FPU_CORE_ISA_H
+#define XTENSA_CORE_DE233_FPU_CORE_ISA_H
//depot/dev/Homewood/Xtensa/SWConfig/hal/core-common.h.tph#24 - edit change 444323 (text+ko)
#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */
-#endif /* XTENSA_CORE_CONFIGURATION_H_ */
-
+#endif /* XTENSA_CORE_DE233_FPU_CORE_ISA_H */
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
-#ifndef _XTENSA_CORE_CONFIGURATION_H
-#define _XTENSA_CORE_CONFIGURATION_H
-
+#ifndef XTENSA_CORE_DSP3400_CORE_ISA_H
+#define XTENSA_CORE_DSP3400_CORE_ISA_H
/****************************************************************************
Parameters Useful for Any Code, USER or PRIVILEGED
#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */
-#endif /* _XTENSA_CORE_CONFIGURATION_H */
-
+#endif /* XTENSA_CORE_DSP3400_CORE_ISA_H */
*
*/
-#ifndef FUZZER_H_
-#define FUZZER_H_
+#ifndef QTEST_FUZZ_H
+#define QTEST_FUZZ_H
#include "qemu/units.h"
#include "qapi/error.h"
int LLVMFuzzerInitialize(int *argc, char ***argv, char ***envp);
#endif
-
* SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef VIRTIOFSD_SECCOMP_H
-#define VIRTIOFSD_SECCOMP_H
-
+#ifndef VIRTIOFSD_PASSTHROUGH_SECCOMP_H
+#define VIRTIOFSD_PASSTHROUGH_SECCOMP_H
void setup_seccomp(bool enable_syslog);
-#endif /* VIRTIOFSD_SECCOMP_H */
+#endif /* VIRTIOFSD_PASSTHROUGH_SECCOMP_H */