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pinctrl: renesas: Add I/O voltage level flag
authorUlrich Hecht <uli+renesas@fpond.eu>
Tue, 12 Jan 2021 16:59:08 +0000 (17:59 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 14 Jan 2021 11:06:15 +0000 (12:06 +0100)
This patch adds config macros describing the voltage levels available on
a pin. The current default (3.3V/1.8V) maps to zero to avoid having to
change existing PFC implementations.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165912.30876-3-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/renesas/pinctrl.c
drivers/pinctrl/renesas/sh_pfc.h

index ac542d2..a49f747 100644 (file)
@@ -634,6 +634,9 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
        }
 
        case PIN_CONFIG_POWER_SOURCE: {
+               int idx = sh_pfc_get_pin_index(pfc, _pin);
+               const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
+               unsigned int lower_voltage;
                u32 pocctrl, val;
                int bit;
 
@@ -648,7 +651,10 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
                val = sh_pfc_read(pfc, pocctrl);
                spin_unlock_irqrestore(&pfc->lock, flags);
 
-               arg = (val & BIT(bit)) ? 3300 : 1800;
+               lower_voltage = (pin->configs & SH_PFC_PIN_VOLTAGE_25_33) ?
+                       2500 : 1800;
+
+               arg = (val & BIT(bit)) ? 3300 : lower_voltage;
                break;
        }
 
@@ -702,6 +708,9 @@ static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
 
                case PIN_CONFIG_POWER_SOURCE: {
                        unsigned int mV = pinconf_to_config_argument(configs[i]);
+                       int idx = sh_pfc_get_pin_index(pfc, _pin);
+                       const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
+                       unsigned int lower_voltage;
                        u32 pocctrl, val;
                        int bit;
 
@@ -712,7 +721,10 @@ static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
                        if (WARN(bit < 0, "invalid pin %#x", _pin))
                                return bit;
 
-                       if (mV != 1800 && mV != 3300)
+                       lower_voltage = (pin->configs & SH_PFC_PIN_VOLTAGE_25_33) ?
+                               2500 : 1800;
+
+                       if (mV != lower_voltage && mV != 3300)
                                return -EINVAL;
 
                        spin_lock_irqsave(&pfc->lock, flags);
index 1404bd8..9787dc8 100644 (file)
@@ -31,6 +31,15 @@ enum {
                                         SH_PFC_PIN_CFG_PULL_DOWN)
 #define SH_PFC_PIN_CFG_IO_VOLTAGE      (1 << 4)
 #define SH_PFC_PIN_CFG_DRIVE_STRENGTH  (1 << 5)
+
+#define SH_PFC_PIN_VOLTAGE_18_33       (0 << 6)
+#define SH_PFC_PIN_VOLTAGE_25_33       (1 << 6)
+
+#define SH_PFC_PIN_CFG_IO_VOLTAGE_18_33        (SH_PFC_PIN_CFG_IO_VOLTAGE | \
+                                        SH_PFC_PIN_VOLTAGE_18_33)
+#define SH_PFC_PIN_CFG_IO_VOLTAGE_25_33        (SH_PFC_PIN_CFG_IO_VOLTAGE | \
+                                        SH_PFC_PIN_VOLTAGE_25_33)
+
 #define SH_PFC_PIN_CFG_NO_GPIO         (1 << 31)
 
 struct sh_pfc_pin {