add SBCS and SUBS

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30930 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index b7e0447..4954865 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -143,6 +143,14 @@ def SUB     : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b),
                        "sub $dst, $a, $b",
                       [(set IntRegs:$dst, (sub IntRegs:$a, addr_mode1:$b))]>;
 
+def SBCS    : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b),
+                       "sbcs $dst, $a, $b",
+                      [(set IntRegs:$dst, (sube IntRegs:$a, addr_mode1:$b))]>;
+
+def SUBS    : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b),
+                       "subs $dst, $a, $b",
+                      [(set IntRegs:$dst, (subc IntRegs:$a, addr_mode1:$b))]>;
+
 def AND     : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b),
                        "and $dst, $a, $b",
                       [(set IntRegs:$dst, (and IntRegs:$a, addr_mode1:$b))]>;

diff --git a/test/CodeGen/ARM/long.ll b/test/CodeGen/ARM/long.ll
index f08ee6a..c01a4cb 100644 (file)
--- a/test/CodeGen/ARM/long.ll
+++ b/test/CodeGen/ARM/long.ll
@@ -5,7 +5,9 @@
 ; RUN: llvm-as < %s | llc -march=arm | grep "mov r0, #-2147483648" | wc -l | grep 1 &&
 ; RUN: llvm-as < %s | llc -march=arm | grep ".word.*4294967295" | wc -l | grep 1 &&
 ; RUN: llvm-as < %s | llc -march=arm | grep "adds" | wc -l | grep 1 &&
-; RUN: llvm-as < %s | llc -march=arm | grep "adcs" | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep "adcs" | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep "subs" | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep "sbcs" | wc -l | grep 1
 
 long %f1() {
 entry:
@@ -44,3 +46,9 @@ entry:
        ret void
 }
 declare long %f8()
+
+long %f9(long %a, long %b) {
+entry:
+       %tmp = sub long %a, %b
+       ret long %tmp
+}