The driver is for USB.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
#include <usb_ops.h>
#endif
-#ifdef CONFIG_PCI_HCI
-#include <pci_ops.h>
-#endif
-
#ifdef CONFIG_SDIO_HCI
#define rtw_le16_to_cpu(val) val
#define rtw_le32_to_cpu(val) val
#else
_set_workitem(&(pLed->BlinkWorkItem));
#endif
-#elif defined(CONFIG_PCI_HCI)
- BlinkHandler(pLed);
#endif
}
/* struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); */
/* endif */
-#ifdef CONFIG_PCI_HCI
-
- /* DBG_8723A("%s\n", __FUNCTION__); */
-
- issue_beacon(padapter, 0);
-
- return _SUCCESS;
-
-#endif
-
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
u32 start = rtw_get_current_time();
if((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len>0))
{
-#ifndef CONFIG_PCI_HCI
rtw_msleep_os(10);/* 10ms, ATIM(HIQ) Windows */
-#endif
/* spin_lock_bh(&psta_bmc->sleep_q.lock); */
spin_lock_bh(&pxmitpriv->lock);
/* spin_unlock_bh(&psta_bmc->sleep_q.lock); */
spin_unlock_bh(&pxmitpriv->lock);
-/* if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) */
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
rtw_chk_hi_queue_cmd(padapter);
#endif
pxmitbuf->len = 0;
pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead;
#endif
-#ifdef CONFIG_PCI_HCI
- pxmitbuf->len = 0;
-#endif
-
if (pxmitbuf->sctx) {
DBG_8723A("%s pxmitbuf->sctx is not NULL\n", __func__);
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC);
pxmitbuf->agg_num = 0;
pxmitbuf->pg_num = 0;
#endif
-#ifdef CONFIG_PCI_HCI
- pxmitbuf->len = 0;
-#endif
-
if (pxmitbuf->sctx) {
DBG_8723A("%s pxmitbuf->sctx is not NULL\n", __func__);
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC);
edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex];
}
#endif
-
-#ifdef CONFIG_PCI_HCI
- if(IS_92C_SERIAL(pHalData->VersionID))
- {
- edca_param = 0x60a42b;
- }
- else
- {
- edca_param = 0x6ea42b;
- }
-#endif
rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
else
btdm_DacSwing(padapter, BT_DACSWING_M7);
}
-#elif defined(CONFIG_PCI_HCI)
- if (pBtMgnt->ExtConfig.bBTBusy)
- {
- RTPRINT(FBT, BT_TRACE, ("BT is non-idle\n"));
- BTDM_FWCoexAllOff(padapter);
- BTDM_AGCTable(padapter, BT_AGCTABLE_OFF);
- BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF);
- btdm_DacSwing(padapter, BT_DACSWING_M4);
- }
- else
- {
- RTPRINT(FBT, BT_TRACE, ("BT is idle\n"));
- btdm_DacSwing(padapter, BT_DACSWING_OFF);
- }
#endif
}
}
}
}
-#ifdef CONFIG_PCI_HCI
-//
-// Description:
-// Perform interrupt migration dynamically to reduce CPU utilization.
-//
-// Assumption:
-// 1. Do not enable migration under WIFI test.
-//
-// Created by Roger, 2010.03.05.
-//
-VOID
-dm_InterruptMigration(
- IN PADAPTER Adapter
- )
-{
- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
- struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
- bool bCurrentIntMt, bCurrentACIntDisable;
- bool IntMtToSet = _FALSE;
- bool ACIntToSet = _FALSE;
-
-
- // Retrieve current interrupt migration and Tx four ACs IMR settings first.
- bCurrentIntMt = pHalData->bInterruptMigration;
- bCurrentACIntDisable = pHalData->bDisableTxInt;
-
- //
- // <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics
- // when interrupt migration is set before. 2010.03.05.
- //
- if(!Adapter->registrypriv.wifi_spec &&
- (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) &&
- pmlmepriv->LinkDetectInfo.bHigherBusyTraffic)
- {
- IntMtToSet = _TRUE;
-
- // To check whether we should disable Tx interrupt or not.
- if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic )
- ACIntToSet = _TRUE;
- }
-
- //Update current settings.
- if( bCurrentIntMt != IntMtToSet ){
- DBG_8723A("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet);
- if(IntMtToSet)
- {
- //
- // <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter.
- // timer 25ns*0xfa0=100us for 0xf packets.
- // 2010.03.05.
- //
- rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx
- pHalData->bInterruptMigration = IntMtToSet;
- }
- else
- {
- // Reset all interrupt migration settings.
- rtw_write32(Adapter, REG_INT_MIG, 0);
- pHalData->bInterruptMigration = IntMtToSet;
- }
- }
-
- /*if( bCurrentACIntDisable != ACIntToSet ){
- DBG_8723A("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet);
- if(ACIntToSet) // Disable four ACs interrupts.
- {
- //
- // <Roger_Notes> Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization.
- // When extremely highly Rx OK occurs, we will disable Tx interrupts.
- // 2010.03.05.
- //
- UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS );
- pHalData->bDisableTxInt = ACIntToSet;
- }
- else// Enable four ACs interrupts.
- {
- UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 );
- pHalData->bDisableTxInt = ACIntToSet;
- }
- }*/
-
-}
-
-#endif
-
//
// Initialize GPIO setting registers
//
goto _record_initrate;
#endif
- //
- // Dynamically switch RTS/CTS protection.
- //
- //dm_CheckProtection(Adapter);
-
-#ifdef CONFIG_PCI_HCI
- // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
- // Tx Migration settings.
- //dm_InterruptMigration(Adapter);
-
- //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
- // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
-#endif
_record_initrate:
// Read REG_INIDATA_RATE_SEL value for TXDESC.
// Check GPIO to determine current RF on/off and Pbc status.
// Check Hardware Radio ON/OFF or not
-#ifdef CONFIG_PCI_HCI
- if(pHalData->bGpioHwWpsPbc)
-#endif
- {
- dm_CheckPbcGPIO(Adapter); // Add by hpfan 2008-03-11
- }
+ dm_CheckPbcGPIO(Adapter); // Add by hpfan 2008-03-11
}
u32 page, offset;
u8 *bufferPtr = (u8*)buffer;
-#ifdef CONFIG_PCI_HCI
- // 20100120 Joseph: Add for 88CE normal chip.
- // Fill in zero to make firmware image to dword alignment.
- _FillDummy(bufferPtr, &size);
-#endif
-
pageNums = size / MAX_PAGE_SIZE ;
//RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n"));
remainSize = size % MAX_PAGE_SIZE;
case C2H_CCX_TX_RPT:
handle_txrpt_ccx_8723a(padapter, c2h_evt->payload);
break;
-
-#ifdef CONFIG_BT_COEXIST
-#ifdef CONFIG_PCI_HCI
- case C2H_BT_RSSI:
- BT_FwC2hBtRssi(padapter, c2h_evt->payload);
- break;
-#endif
-#endif
-
case C2H_EXT_RA_RPT:
-// C2HExtRaRptHandler(padapter, tmpBuf, C2hEvent.CmdLen);
break;
-
case C2H_HW_INFO_EXCH:
RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], C2H_HW_INFO_EXCH\n"));
for (i = 0; i < c2h_evt->plen; i++) {
pdesc->txdw5 = cpu_to_le32(pdesc->txdw5);
pdesc->txdw6 = cpu_to_le32(pdesc->txdw6);
pdesc->txdw7 = cpu_to_le32(pdesc->txdw7);
-#ifdef CONFIG_PCI_HCI
- pdesc->txdw8 = cpu_to_le32(pdesc->txdw8);
- pdesc->txdw9 = cpu_to_le32(pdesc->txdw9);
- pdesc->txdw10 = cpu_to_le32(pdesc->txdw10);
- pdesc->txdw11 = cpu_to_le32(pdesc->txdw11);
- pdesc->txdw12 = cpu_to_le32(pdesc->txdw12);
- pdesc->txdw13 = cpu_to_le32(pdesc->txdw13);
- pdesc->txdw14 = cpu_to_le32(pdesc->txdw14);
- pdesc->txdw15 = cpu_to_le32(pdesc->txdw15);
-#endif
-
rtl8723a_cal_txdesc_chksum(pdesc);
}
rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile);
#endif//CONFIG_EMBEDDED_FWIMG
-#ifdef CONFIG_PCI_HCI
- //this switching setting cause some 8192cu hw have redownload fw fail issue
- //improve 2-stream TX EVM by Jenyu
- if(is92C)
- rtw_write8(Adapter, REG_SPS0_CTRL+3,0x71);
-#endif
-
-
// 2010.07.13 AMPDU aggregation number 9
//rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM);
rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A); //By tynli. 2010.11.18.
#define Reset_Cnt_Limit 3
-#ifdef CONFIG_PCI_HCI
-#define MAX_AGGR_NUM 0x0A0A
-#else
#define MAX_AGGR_NUM 0x0909
-#endif
-
-#ifdef CONFIG_PCI_HCI
-#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \
-{ \
- u1Byte u1bTmp; \
- u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \
- u1bTmp |= BIT0; \
- PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \
- PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \
- PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \
- PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
- delay_us(100); \
- PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
- PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \
- delay_us(10); \
- PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \
- delay_us(10); \
- PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
- delay_us(10); \
- PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
-}
-#endif
-
/*--------------------------Define Parameters-------------------------------*/
/*-------- below is for PCIE INTERFACE --------*/
-#ifdef CONFIG_PCI_HCI
-
- struct pci_dev *ppcidev;
-
- //PCI MEM map
- unsigned long pci_mem_end; /* shared mem end */
- unsigned long pci_mem_start; /* shared mem start */
-
- //PCI IO map
- unsigned long pci_base_addr; /* device I/O address */
-
- //PciBridge
- struct pci_priv pcipriv;
-
- u16 irqline;
- u8 irq_enabled;
- RT_ISR_CONTENT isr_content;
- _lock irq_th_lock;
-
- //ASPM
- u8 const_pci_aspm;
- u8 const_amdpci_aspm;
- u8 const_hwsw_rfoff_d3;
- u8 const_support_pciaspm;
- // pci-e bridge */
- u8 const_hostpci_aspm_setting;
- // pci-e device */
- u8 const_devicepci_aspm_setting;
- u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
- u8 b_support_backdoor;
- u8 bdma64;
-#endif//CONFIG_PCI_HCI
};
static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
#ifdef CONFIG_GSPI_HCI
return &dvobj->intf_data.func->dev;
#endif
-#ifdef CONFIG_PCI_HCI
- return &dvobj->ppcidev->dev;
-#endif
}
enum _IFACE_TYPE {
#include <osdep_service.h>
#include <drv_types.h>
-#ifdef CONFIG_PCI_HCI
-#include <pci_hal.h>
-#endif
-
-
enum RTL871X_HCI_TYPE {
RTW_PCIE = BIT0,
RTW_USB = BIT1,
#endif
#ifdef CONFIG_USB_HCI
#define DEV_BUS_TYPE RT_USB_INTERFACE
- #elif defined(CONFIG_PCI_HCI)
- #define DEV_BUS_TYPE RT_PCI_INTERFACE
#elif defined(CONFIG_SDIO_HCI)
#define DEV_BUS_TYPE RT_SDIO_INTERFACE
#elif defined(CONFIG_GSPI_HCI)
#endif
#endif
-#ifdef CONFIG_PCI_HCI
-#include <linux/pci.h>
-#endif
-
-
#ifdef CONFIG_USB_HCI
typedef struct urb * PURB;
#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22))
#define MAX_RECVBUF_SZ (4000) // about 4K
#endif
-#elif defined(CONFIG_PCI_HCI)
-//#ifndef CONFIG_MINIMAL_MEMORY_USAGE
-// #define MAX_RECVBUF_SZ (9100)
-//#else
- #define MAX_RECVBUF_SZ (4000) // about 4K
-//#endif
-
-#define RX_MPDU_QUEUE 0
-#define RX_CMD_QUEUE 1
-#define RX_MAX_QUEUE 2
-
#elif defined(CONFIG_SDIO_HCI)
#define MAX_RECVBUF_SZ (10240)
void rtl8192cu_free_recv_priv(_adapter * padapter);
#endif
-#ifdef CONFIG_PCI_HCI
-int rtl8192ce_init_recv_priv(_adapter * padapter);
-void rtl8192ce_free_recv_priv(_adapter * padapter);
-#endif
-
void rtl8192c_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_status);
void rtl8192c_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc);
#define RTL_EEPROM_ID 0x8129
-
-#ifdef CONFIG_PCI_HCI
-#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER)
-#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK)
-#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS)
-
-//
-// Interface type.
-//
-typedef enum _INTERFACE_SELECT_8192CPCIe{
- INTF_SEL0_SOLO_MINICARD = 0, // WiFi solo-mCard
- INTF_SEL1_BT_COMBO_MINICARD = 1, // WiFi+BT combo-mCard
- INTF_SEL2_PCIe = 2, // PCIe Card
-} INTERFACE_SELECT_8192CPCIe, *PINTERFACE_SELECT_8192CPCIe;
-
-#define RTL8190_EEPROM_ID 0x8129 // 0-1
-#define EEPROM_HPON 0x02 // LDO settings.2-5
-#define EEPROM_CLK 0x06 // Clock settings.6-7
-#define EEPROM_TESTR 0x08 // SE Test mode.8
-
-#define EEPROM_VID 0x0A // SE Vendor ID.A-B
-#define EEPROM_DID 0x0C // SE Device ID. C-D
-#define EEPROM_SVID 0x0E // SE Vendor ID.E-F
-#define EEPROM_SMID 0x10 // SE PCI Subsystem ID. 10-11
-
-#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17
-
-//----------------------------------------------------------------
-// Ziv - Let PCIe and USB use the same define. Modify address mapping later.
-#define EEPROM_CCK_TX_PWR_INX 0x5A
-#define EEPROM_HT40_1S_TX_PWR_INX 0x60
-#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66
-#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69
-#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C
-#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F
-#define EEPROM_HT20_MAX_PWR_OFFSET 0x72
-
-#define EEPROM_CHANNEL_PLAN 0x75
-#define EEPROM_TSSI_A 0x76
-#define EEPROM_TSSI_B 0x77
-#define EEPROM_THERMAL_METER 0x78
-#define EEPROM_RF_OPT1 0x79
-#define EEPROM_RF_OPT2 0x7A
-#define EEPROM_RF_OPT3 0x7B
-#define EEPROM_RF_OPT4 0x7C
-#define EEPROM_VERSION 0x7E
-#define EEPROM_CUSTOMER_ID 0x7F
-
-#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5]
-
-#endif
-
#ifdef CONFIG_USB_HCI
//should be renamed and moved to another file
#endif
-#ifdef CONFIG_PCI_HCI
-s32 rtl8192ce_init_xmit_priv(_adapter * padapter);
-void rtl8192ce_free_xmit_priv(_adapter * padapter);
-
-s32 rtl8192ce_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf);
-struct xmit_buf *rtl8192ce_dequeue_xmitbuf(struct rtw_tx_ring *ring);
-
-void rtl8192ce_xmitframe_resume(_adapter *padapter);
-
-s32 rtl8192ce_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
-
-s32 rtl8192ce_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
-
-#ifdef CONFIG_HOSTAPD_MLME
-s32 rtl8192ce_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
-#endif
-
-#endif
-
#endif
void rtl8723au_InitSwLeds(PADAPTER padapter);
void rtl8723au_DeInitSwLeds(PADAPTER padapter);
#endif
-#ifdef CONFIG_PCI_HCI
-void rtl8723ae_gen_RefreshLedState(PADAPTER Adapter);
-void rtl8723ae_InitSwLeds(PADAPTER padapter);
-void rtl8723ae_DeInitSwLeds(PADAPTER padapter);
-#endif
#ifdef CONFIG_SDIO_HCI
void rtl8723as_InitSwLeds(PADAPTER padapter);
void rtl8723as_DeInitSwLeds(PADAPTER padapter);
_workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED.
#endif //defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
-#if defined(CONFIG_PCI_HCI)
- u8 bLedSlowBlinkInProgress;//added by vivi, for led new mode
-#endif
-
} LED_871x, *PLED_871x;
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
);
#endif //defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
-#if defined(CONFIG_PCI_HCI)
-//================================================================================
-// LED customization.
-//================================================================================
-
-typedef enum _LED_STRATEGY_871x{
- SW_LED_MODE0 = 0, // SW control 1 LED via GPIO0. It is default option.
- SW_LED_MODE1 = 1, // SW control for PCI Express
- SW_LED_MODE2 = 2, // SW control for Cameo.
- SW_LED_MODE3 = 3, // SW contorl for RunTop.
- SW_LED_MODE4 = 4, // SW control for Netcore
- SW_LED_MODE5 = 5, //added by vivi, for led new mode, DLINK
- SW_LED_MODE6 = 6, //added by vivi, for led new mode, PRONET
- SW_LED_MODE7 = 7, //added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec
- SW_LED_MODE8 = 8, //added by chiyokolin, for QMI
- SW_LED_MODE9 = 9, //added by chiyokolin, for BITLAND, PCI Express Minicard Spec Rev.1.1
- SW_LED_MODE10 = 10, //added by chiyokolin, for Edimax-ASUS
- HW_LED = 50, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes)
- LED_ST_NONE = 99,
-}LED_STRATEGY_871x, *PLED_STRATEGY_871x;
-#endif //defined(CONFIG_PCI_HCI)
-
struct led_priv{
/* add for led controll */
LED_871x SwLed0;
u32 cur_ps_level;
u32 reg_rfps_level;
-
-
-#ifdef CONFIG_PCI_HCI
- //just for PCIE ASPM
- u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
- u8 b_support_backdoor;
-
- //just for PCIE ASPM
- u8 const_amdpci_aspm;
-#endif
-
uint ips_enter_cnts;
uint ips_leave_cnts;
unsigned int rxdw4;
unsigned int rxdw5;
-
-#ifdef CONFIG_PCI_HCI
- unsigned int rxdw6;
-
- unsigned int rxdw7;
-#endif
};
#define EOR BIT(30)
-#ifdef CONFIG_PCI_HCI
-#define PCI_MAX_RX_QUEUE 1// MSDU packet queue, Rx Command Queue
-#define PCI_MAX_RX_COUNT 128
-
-struct rtw_rx_ring {
- struct recv_stat *desc;
- dma_addr_t dma;
- unsigned int idx;
- struct sk_buff *rx_buf[PCI_MAX_RX_COUNT];
-};
-#endif
-
/*
accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch)
; halt(passive) ;
_queue recv_buf_pending_queue;
#endif
-#ifdef CONFIG_PCI_HCI
- // Rx
- struct rtw_rx_ring rx_ring[PCI_MAX_RX_QUEUE];
- int rxringcount;
- u16 rxbuffersize;
-#endif
-
//For display the phy informatiom
u8 is_signal_dbg; // for debug
u8 signal_strength_dbg; // for debug
#else
#define NR_XMITBUFF (4)
#endif //CONFIG_SINGLE_XMIT_BUF
-#elif defined (CONFIG_PCI_HCI)
-#define MAX_XMITBUF_SZ (1664)
-#define NR_XMITBUFF (128)
#endif
-#ifdef CONFIG_PCI_HCI
-#define XMITBUF_ALIGN_SZ 4
-#else
#define XMITBUF_ALIGN_SZ 512
-#endif
// xmit extension buff defination
#define MAX_XMIT_EXTBUF_SZ (1536)
#define HW_QUEUE_ENTRY 8
-#ifdef CONFIG_PCI_HCI
-//#define TXDESC_NUM 64
-#define TXDESC_NUM 128
-#define TXDESC_NUM_BE_QUEUE 128
-#endif
-
#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
do{\
pattrib_iv[0] = dot11txpn._byte_.TSC0;\
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
#endif
-#ifdef CONFIG_PCI_HCI
-#define TXDESC_OFFSET 0
-#define TX_DESC_NEXT_DESC_OFFSET 40
-#endif
-
-
-
struct tx_desc{
//DWORD 0
unsigned int txdw6;
unsigned int txdw7;
-#ifdef CONFIG_PCI_HCI
- unsigned int txdw8;
-
- unsigned int txdw9;
-
- unsigned int txdw10;
-
- unsigned int txdw11;
-
- // 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor
- // size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute
- // memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor
- // number or enlarge descriptor size as 64 bytes.
- unsigned int txdw12;
-
- unsigned int txdw13;
-
- unsigned int txdw14;
-
- unsigned int txdw15;
-#endif
};
unsigned int value[TXDESC_SIZE>>2];
};
-#ifdef CONFIG_PCI_HCI
-#define PCI_MAX_TX_QUEUE_COUNT 8
-
-struct rtw_tx_ring {
- struct tx_desc *desc;
- dma_addr_t dma;
- unsigned int idx;
- unsigned int entries;
- _queue queue;
- u32 qlen;
-};
-#endif
-
struct hw_xmit {
//spinlock_t xmit_lock;
//_list pending;
int accnt;
};
-#if 0
-struct pkt_attrib
-{
- u8 type;
- u8 subtype;
- u8 bswenc;
- u8 dhcp_pkt;
- u16 ether_type;
- int pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data)
- int pkt_hdrlen; //the original 802.3 pkt header len
- int hdrlen; //the WLAN Header Len
- int nr_frags;
- int last_txcmdsz;
- int encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith
- u8 iv[8];
- int iv_len;
- u8 icv[8];
- int icv_len;
- int priority;
- int ack_policy;
- int mac_id;
- int vcs_mode; //virtual carrier sense method
-
- u8 dst[ETH_ALEN];
- u8 src[ETH_ALEN];
- u8 ta[ETH_ALEN];
- u8 ra[ETH_ALEN];
-
- u8 key_idx;
-
- u8 qos_en;
- u8 ht_en;
- u8 raid;//rate adpative id
- u8 bwmode;
- u8 ch_offset;//PRIME_CHNL_OFFSET
- u8 sgi;//short GI
- u8 ampdu_en;//tx ampdu enable
- u8 mdata;//more data bit
- u8 eosp;
-
- u8 pctrl;//per packet txdesc control enable
- u8 triggered;//for ap mode handling Power Saving sta
-
- u32 qsel;
- u16 seqnum;
-
- struct sta_info * psta;
-#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
- u8 hw_tcp_csum;
-#endif
-};
-#else
//reduce size
struct pkt_attrib
{
u8 hw_tcp_csum;
#endif
};
-#endif
#define WLANHDR_OFFSET 64
#endif
-#ifdef CONFIG_PCI_HCI
- // Tx
- struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT];
- int txringcount[PCI_MAX_TX_QUEUE_COUNT];
- u8 beaconDMAing; //flag of indicating beacon is transmiting to HW by DMA
- struct tasklet_struct xmit_tasklet;
-#endif
-
#ifdef CONFIG_SDIO_HCI
#ifdef CONFIG_SDIO_TX_TASKLET
struct tasklet_struct xmit_tasklet;
desc->txdw5 = cpu_to_le32(desc->txdw5);
desc->txdw6 = cpu_to_le32(desc->txdw6);
desc->txdw7 = cpu_to_le32(desc->txdw7);
-#ifdef CONFIG_PCI_HCI
- desc->txdw8 = cpu_to_le32(desc->txdw8);
- desc->txdw9 = cpu_to_le32(desc->txdw9);
- desc->txdw10 = cpu_to_le32(desc->txdw10);
- desc->txdw11 = cpu_to_le32(desc->txdw11);
- desc->txdw12 = cpu_to_le32(desc->txdw12);
- desc->txdw13 = cpu_to_le32(desc->txdw13);
- desc->txdw14 = cpu_to_le32(desc->txdw14);
- desc->txdw15 = cpu_to_le32(desc->txdw15);
-#endif
cal_txdesc_chksum(desc);
#include <usb_osintf.h>
#endif
-#ifdef CONFIG_PCI_HCI
-#include <pci_osintf.h>
-#endif
-
#ifdef CONFIG_BR_EXT
#include <rtw_br_ext.h>
#endif //CONFIG_BR_EXT
}
#endif
-#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
- pxmitbuf->pallocated_buf = kzalloc(alloc_sz);
- if (pxmitbuf->pallocated_buf == NULL) {
- return _FAIL;
- }
-
- pxmitbuf->pbuf = PTR_ALIGN(pxmitbuf->pallocated_buf, XMITBUF_ALIGN_SZ);
-#endif
-
return _SUCCESS;
}
#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX
#endif
-#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
- if(pxmitbuf->pallocated_buf)
- kfree(pxmitbuf->pallocated_buf);
-#endif
}
#define WMM_XMIT_THRESHOLD (NR_XMITFRAME*2/5)