[VM][PC9801] Apply wait factors to before commit.

[VM][PC9801][CPUREG] TRY: Improve reset sequence.Still be imcomplete.

diff --git a/source/src/vm/pc9801/cpureg.cpp b/source/src/vm/pc9801/cpureg.cpp
index fa43dac..49e70c2 100644 (file)
--- a/source/src/vm/pc9801/cpureg.cpp
+++ b/source/src/vm/pc9801/cpureg.cpp
@@ -34,9 +34,13 @@ void CPUREG::initialize()
 void CPUREG::halt_by_use_v30()
 {
        if((use_v30)) {
+               d_cpu->write_signal(SIG_CPU_HALTREQ, 1, 1);
+               d_v30cpu->write_signal(SIG_CPU_HALTREQ, 0, 1);
                d_cpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
                d_v30cpu->write_signal(SIG_CPU_BUSREQ, 0, 1);
        } else {
+               d_cpu->write_signal(SIG_CPU_HALTREQ, 0, 1);
+               d_v30cpu->write_signal(SIG_CPU_HALTREQ, 1, 1);
                d_cpu->write_signal(SIG_CPU_BUSREQ, 0, 1);
                d_v30cpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
        }
@@ -48,11 +52,15 @@ void CPUREG::halt_by_value(bool val)
        bool haltvalue = (val) ? 0xffffffff : 0x0000000;
 #if defined(HAS_V30_SUB_CPU)
        if((use_v30)) {
+               d_cpu->write_signal(SIG_CPU_HALTREQ, 0xffffffff, 0xffffffff);
                d_cpu->write_signal(SIG_CPU_BUSREQ, 0xffffffff, 0xffffffff);
+               d_v30cpu->write_signal(SIG_CPU_HALTREQ, 0, 0xffffffff);
                d_v30cpu->write_signal(SIG_CPU_BUSREQ, haltvalue, 0xffffffff);
        } else {
+               d_cpu->write_signal(SIG_CPU_HALTREQ, 0, 0xffffffff);
                d_cpu->write_signal(SIG_CPU_BUSREQ, haltvalue, 0xffffffff);
                d_v30cpu->write_signal(SIG_CPU_BUSREQ, 0xffffffff, 0xffffffff);
+               d_v30cpu->write_signal(SIG_CPU_HALTREQ, 0xffffffff, 0xffffffff);
        }
 #else
        d_cpu->write_signal(SIG_CPU_BUSREQ, haltvalue, 0xffffffff);

diff --git a/source/src/vm/pc9801/pc9801.cpp b/source/src/vm/pc9801/pc9801.cpp
index 1fdcf19..d1ffde4 100644 (file)
--- a/source/src/vm/pc9801/pc9801.cpp
+++ b/source/src/vm/pc9801/pc9801.cpp
@@ -1133,11 +1133,11 @@ void VM::set_cpu_clock_with_switch(int speed_type)
 #endif
        uint32_t waitfactor;
        if(CPU_CLOCKS > cpu_clocks) {
-               waitfactor = (uint32_t)(65536.0 * ((1.0 - (double)cpu_clocks / (double)CPU_CLOCKS)));
-               //out_debug_log(_T("CLOCK=%d WAIT FACTOR=%d"), cpu_clocks, waitfactor);
+//             waitfactor = (uint32_t)(65536.0 * ((1.0 - (double)cpu_clocks / (double)CPU_CLOCKS)));
+               waitfactor = (uint32_t)(65536.0 * ((double)CPU_CLOCKS / (double)cpu_clocks));
        } else {
-               waitfactor = 0;
-               //out_debug_log(_T("CLOCK=%d WAIT FACTOR=%d"), cpu_clocks, waitfactor);
+               waitfactor = 65536;
+//             out_debug_log(_T("CLOCK=%d WAIT FACTOR=%d"), cpu_clocks, waitfactor);
        }
        cpu->write_signal(SIG_CPU_WAIT_FACTOR, waitfactor, 0xffffffff);
 #if defined(HAS_V30_SUB_CPU)