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drm: sun4i: drop second PLL from A64 HDMI PHY
author
Icenowy Zheng
<icenowy@aosc.io>
Sun, 16 Sep 2018 04:34:06 +0000
(12:34 +0800)
committer
Maxime Ripard
<maxime.ripard@bootlin.com>
Wed, 19 Sep 2018 07:58:40 +0000
(09:58 +0200)
The A64 HDMI PHY seems to be not able to use the second video PLL as
clock parent in experiments.
Drop the support for the second PLL from A64 HDMI PHY driver.
Fixes:
b46e2c9f5f64
("drm/sun4i: Add support for A64 HDMI PHY")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link:
https://patchwork.freedesktop.org/patch/msgid/20180916043409.62374-2-icenowy@aosc.io
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
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diff --git
a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
index
82502b3
..
a564b5d
100644
(file)
--- a/
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+++ b/
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
@@
-398,7
+398,6
@@
static struct regmap_config sun8i_hdmi_phy_regmap_config = {
static const struct sun8i_hdmi_phy_variant sun50i_a64_hdmi_phy = {
.has_phy_clk = true,
- .has_second_pll = true,
.phy_init = &sun8i_hdmi_phy_init_h3,
.phy_disable = &sun8i_hdmi_phy_disable_h3,
.phy_config = &sun8i_hdmi_phy_config_h3,