Merge "ARM: dts: msm: Add G-Link SSR entries for MSMFALCON"

diff --cc arch/arm/boot/dts/qcom/msmfalcon.dtsi
index d816237,2b97599..ea60ed9
--- 1/arch/arm/boot/dts/qcom/msmfalcon.dtsi
--- 2/arch/arm/boot/dts/qcom/msmfalcon.dtsi
+++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi
@@@ -330,6 -268,40 +330,42 @@@
                        "smem_targ_info_reg";
                qcom,mpu-enabled;
        };
+ 
+       glink_mpss: qcom,glink-ssr-modem {
+               compatible = "qcom,glink_ssr";
+               label = "modem";
+               qcom,edge = "mpss";
+               qcom,notify-edges = <&glink_lpass>, <&glink_rpm>,
+                               <&glink_cdsp>;
+               qcom,xprt = "smem";
+       };
+ 
+       glink_lpass: qcom,glink-ssr-adsp {
+               compatible = "qcom,glink_ssr";
+               label = "adsp";
+               qcom,edge = "lpass";
+               qcom,notify-edges = <&glink_mpss>, <&glink_rpm>,
+                               <&glink_cdsp>;
+               qcom,xprt = "smem";
+       };
+ 
+       glink_rpm: qcom,glink-ssr-rpm {
+               compatible = "qcom,glink_ssr";
+               label = "rpm";
+               qcom,edge = "rpm";
+               qcom,notify-edges = <&glink_lpass>, <&glink_mpss>,
+                               <&glink_cdsp>;
+               qcom,xprt = "smem";
+       };
+ 
+       glink_cdsp: qcom,glink-ssr-cdsp {
+               compatible = "qcom,glink_ssr";
+               label = "cdsp";
+               qcom,edge = "cdsp";
+               qcom,notify-edges = <&glink_lpass>, <&glink_mpss>,
+                               <&glink_rpm>;
+               qcom,xprt = "smem";
+       };
  };
 +
 +#include "msmfalcon-ion.dtsi"