drm/amd/display: Create debug option to disable v.active clock change policy.

[WHY]
It has been a useful option in debugging GFXOFF and P.State Change issues.
May be required as for platform specific workaround.

[HOW]
Create option in enum dc_debug_options, "disable_vactive_clock_change".
When it is set, dm_dram_clock_change_vactive, will translate into
p_state_change_support: false.

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 5d47871..cc45d77 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -423,6 +423,7 @@ struct dc_debug_options {
        int force_clock_mode;/*every mode change.*/
 
        bool nv12_iflip_vm_wa;
+       bool disable_dram_clock_change_vactive_support;
 };
 
 struct dc_debug_data {

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index bbd1c98..e73a656 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -2850,6 +2850,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
        bool full_pstate_supported = false;
        bool dummy_pstate_supported = false;
        double p_state_latency_us = context->bw_ctx.dml.soc.dram_clock_change_latency_us;
+       context->bw_ctx.dml.soc.disable_dram_clock_change_vactive_support = dc->debug.disable_dram_clock_change_vactive_support;
 
        if (fast_validate)
                return dcn20_validate_bandwidth_internal(dc, context, true);

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index 6c6c486..77b7574 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -2577,7 +2577,8 @@ static void dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
                        mode_lib->vba.MinActiveDRAMClockChangeMargin
                                        + mode_lib->vba.DRAMClockChangeLatency;
 
-       if (mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) {
+       if (mode_lib->vba.DRAMClockChangeSupportsVActive &&
+                       mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) {
                mode_lib->vba.DRAMClockChangeWatermark += 25;
                mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
        } else {

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index d63ca4c..62dfd36 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -2611,12 +2611,12 @@ static void dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
                        mode_lib->vba.MinActiveDRAMClockChangeMargin
                                        + mode_lib->vba.DRAMClockChangeLatency;
 
-
-       if (mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) {
+       if (mode_lib->vba.DRAMClockChangeSupportsVActive &&
+               mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) {
                mode_lib->vba.DRAMClockChangeWatermark += 25;
                mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
        } else if (mode_lib->vba.DummyPStateCheck &&
-                               mode_lib->vba.MinActiveDRAMClockChangeMargin > 0) {
+                       mode_lib->vba.MinActiveDRAMClockChangeMargin > 0) {
                mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
        } else {
                if (mode_lib->vba.SynchronizedVBlank || mode_lib->vba.NumberOfActivePlanes == 1) {

diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
index cfacd60..1935618 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
@@ -112,6 +112,7 @@ struct _vcs_dpi_soc_bounding_box_st {
        bool do_urgent_latency_adjustment;
        double urgent_latency_adjustment_fabric_clock_component_us;
        double urgent_latency_adjustment_fabric_clock_reference_mhz;
+       bool disable_dram_clock_change_vactive_support;
 };
 
 struct _vcs_dpi_ip_params_st {

diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 81db851..da5e9d2 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -223,6 +223,8 @@ static void fetch_socbb_params(struct display_mode_lib *mode_lib)
        mode_lib->vba.SREnterPlusExitTime = soc->sr_enter_plus_exit_time_us;
        mode_lib->vba.DRAMClockChangeLatency = soc->dram_clock_change_latency_us;
        mode_lib->vba.DummyPStateCheck = soc->dram_clock_change_latency_us == soc->dummy_pstate_latency_us;
+       mode_lib->vba.DRAMClockChangeSupportsVActive = !soc->disable_dram_clock_change_vactive_support ||
+                       mode_lib->vba.DummyPStateCheck;
 
        mode_lib->vba.Downspreading = soc->downspread_percent;
        mode_lib->vba.DRAMChannelWidth = soc->dram_channel_width_bytes;   // new!

diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 6c59a33..6d8b5c6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -156,6 +156,7 @@ struct vba_vars_st {
        unsigned int DSCFormatFactor;
 
        bool DummyPStateCheck;
+       bool DRAMClockChangeSupportsVActive;
        bool PrefetchModeSupported;
        enum self_refresh_affinity AllowDRAMSelfRefreshOrDRAMClockChangeInVblank; // Mode Support only
        double XFCRemoteSurfaceFlipDelay;