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radeonsi: disallow constant buffers with a 64-bit address in slot 0
authorMarek Olšák <marek.olsak@amd.com>
Sun, 31 Dec 2017 21:58:57 +0000 (22:58 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Sat, 17 Feb 2018 03:52:17 +0000 (04:52 +0100)
State trackers must use a user buffer or const_uploader,
or set pipe_resource::flags same as const_uploader->flags.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
src/gallium/drivers/radeonsi/si_descriptors.c
src/gallium/drivers/radeonsi/si_get.c

index 009e803..96525fd 100644 (file)
@@ -1214,6 +1214,12 @@ static void si_pipe_set_constant_buffer(struct pipe_context *ctx,
        if (shader >= SI_NUM_SHADERS)
                return;
 
+       if (slot == 0 && input && input->buffer &&
+           !(r600_resource(input->buffer)->flags & RADEON_FLAG_32BIT)) {
+               assert(!"constant buffer 0 must have a 32-bit VM address, use const_uploader");
+               return;
+       }
+
        slot = si_get_constbuf_slot(slot);
        si_set_constant_buffer(sctx, &sctx->const_and_shader_buffers[shader],
                               si_const_and_shader_buffer_descriptors_idx(shader),
index a67daa5..6e6149a 100644 (file)
@@ -268,12 +268,14 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_TILE_RASTER_ORDER:
        case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
        case PIPE_CAP_CONTEXT_PRIORITY_MASK:
-       case PIPE_CAP_CONSTBUF0_FLAGS:
                return 0;
 
        case PIPE_CAP_FENCE_SIGNAL:
                return sscreen->info.has_syncobj;
 
+       case PIPE_CAP_CONSTBUF0_FLAGS:
+               return R600_RESOURCE_FLAG_32BIT;
+
        case PIPE_CAP_NATIVE_FENCE_FD:
                return sscreen->info.has_fence_to_handle;