freedreno/ir3: fix FSLT/etc handling to return 0/-1 instead of 0/1.0

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
index 25211fe..48cdcb7 100644 (file)
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
@@ -1411,21 +1411,25 @@ trans_cmp(const struct instr_translater *t,
 
        switch (t->tgsi_opc) {
        case TGSI_OPCODE_SEQ:
-       case TGSI_OPCODE_FSEQ:
        case TGSI_OPCODE_SGE:
-       case TGSI_OPCODE_FSGE:
        case TGSI_OPCODE_SLE:
        case TGSI_OPCODE_SNE:
-       case TGSI_OPCODE_FSNE:
        case TGSI_OPCODE_SGT:
        case TGSI_OPCODE_SLT:
-       case TGSI_OPCODE_FSLT:
                /* cov.u16f16 dst, tmp0 */
                instr = instr_create(ctx, 1, 0);
                instr->cat1.src_type = get_utype(ctx);
                instr->cat1.dst_type = get_ftype(ctx);
                vectorize(ctx, instr, dst, 1, tmp_src, 0);
                break;
+       case TGSI_OPCODE_FSEQ:
+       case TGSI_OPCODE_FSGE:
+       case TGSI_OPCODE_FSNE:
+       case TGSI_OPCODE_FSLT:
+               /* absneg.s dst, (neg)tmp0 */
+               instr = instr_create(ctx, 2, OPC_ABSNEG_S);
+               vectorize(ctx, instr, dst, 1, tmp_src, IR3_REG_NEGATE);
+               break;
        case TGSI_OPCODE_CMP:
                a1 = &inst->Src[1].Register;
                a2 = &inst->Src[2].Register;