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drm/amd/display: Block 6Ghz timing if SBIOS set HDMI_6G_en to 0
authorCharlene Liu <charlene.liu@amd.com>
Wed, 23 Aug 2017 00:15:28 +0000 (20:15 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 22:17:05 +0000 (18:17 -0400)
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

index 2c683d4..2c41144 100644 (file)
@@ -1853,6 +1853,7 @@ static enum bp_result bios_parser_get_encoder_cap_info(
 
        info->DP_HBR2_EN = record->usHBR2En;
        info->DP_HBR3_EN = record->usHBR3En;
+       info->HDMI_6GB_EN = record->usHDMI6GEn;
        return BP_RESULT_OK;
 }
 
index 559a9f8..0ce94ed 100644 (file)
@@ -887,6 +887,9 @@ static bool dce110_link_encoder_validate_hdmi_output(
                        crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
                return false;
 
+       if (!enc110->base.features.flags.bits.HDMI_6GB_EN &&
+               adjusted_pix_clk_khz >= 300000)
+               return false;
        return true;
 }
 
@@ -1008,6 +1011,7 @@ bool dce110_link_encoder_construct(
                                bp_cap_info.DP_HBR2_EN;
                enc110->base.features.flags.bits.IS_HBR3_CAPABLE =
                                bp_cap_info.DP_HBR3_EN;
+               enc110->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
        }
 
        return true;
index 38e4070..961bbcc 100644 (file)
@@ -37,6 +37,7 @@ struct encoder_feature_support {
                        uint32_t IS_TPS3_CAPABLE:1;
                        uint32_t IS_TPS4_CAPABLE:1;
                        uint32_t IS_YCBCR_CAPABLE:1;
+                       uint32_t HDMI_6GB_EN:1;
                } bits;
                uint32_t raw;
        } flags;