ARM: dts: imx6qdl-sabreauto: add flexcan support

The flexcan1 is pin conflict with fec. User would make flexcan1 enabled
with fec disabled to use CAN.

Signed-off-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 38f94a1..a031023 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -101,6 +101,25 @@
                enable-active-high;
        };
 
+       reg_can_en: regulator-can-en {
+               compatible = "regulator-fixed";
+               regulator-name = "can-en";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&max7310_b 6 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       reg_can_stby: regulator-can-stby {
+               compatible = "regulator-fixed";
+               regulator-name = "can-stby";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               vin-supply = <&reg_can_en>;
+       };
+
        sound-cs42888 {
                compatible = "fsl,imx6-sabreauto-cs42888",
                        "fsl,imx-audio-cs42888";
@@ -279,6 +298,20 @@
        status = "okay";
 };
 
+&can1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan1>;
+       xceiver-supply = <&reg_can_stby>;
+       status = "disabled"; /* pin conflict with fec */
+};
+
+&can2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan2>;
+       xceiver-supply = <&reg_can_stby>;
+       status = "okay";
+};
+
 &gpmi {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gpmi_nand>;
@@ -494,6 +527,20 @@
                        >;
                };
 
+               pinctrl_flexcan1: flexcan1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x17059
+                               MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x17059
+                       >;
+               };
+
+               pinctrl_flexcan2: flexcan2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX        0x17059
+                               MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX        0x17059
+                       >;
+               };
+
                pinctrl_gpio_keys: gpiokeysgrp {
                        fsl,pins = <
                                MX6QDL_PAD_SD2_CMD__GPIO1_IO11          0x1b0b0