drm/amdgpu: only check mmBIF_IOV_FUNC_IDENTIFIER on tonga/fiji

We only support SR-IOV on tonga/fiji.  Don't check this register
on other VI parts.

Fixes: 048765ad5af7c89 (amdgpu: fix asic initialization for virtualized environments (v2))
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index d9bb263..c59b373 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -449,14 +449,19 @@ static bool vi_read_bios_from_rom(struct amdgpu_device *adev,
 
 static void vi_detect_hw_virtualization(struct amdgpu_device *adev)
 {
-       uint32_t reg = RREG32(mmBIF_IOV_FUNC_IDENTIFIER);
-       /* bit0: 0 means pf and 1 means vf */
-       /* bit31: 0 means disable IOV and 1 means enable */
-       if (reg & 1)
-               adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF;
-
-       if (reg & 0x80000000)
-               adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;
+       uint32_t reg = 0;
+
+       if (adev->asic_type == CHIP_TONGA ||
+           adev->asic_type == CHIP_FIJI) {
+              reg = RREG32(mmBIF_IOV_FUNC_IDENTIFIER);
+              /* bit0: 0 means pf and 1 means vf */
+              /* bit31: 0 means disable IOV and 1 means enable */
+              if (reg & 1)
+                      adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF;
+
+              if (reg & 0x80000000)
+                      adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;
+       }
 
        if (reg == 0) {
                if (is_virtual_machine()) /* passthrough mode exclus sr-iov mode */