ARM: dts: bcm2711: Add the BSC interrupt controller

The BSC controllers used for the HDMI DDC have an interrupt controller
shared between both instances. Let's add it to avoid polling.

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/20210111142309.193441-1-maxime@cerno.tech

diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
index f53a51c..d84e731 100644 (file)
--- a/arch/arm/boot/dts/bcm2711.dtsi
+++ b/arch/arm/boot/dts/bcm2711.dtsi
@@ -308,6 +308,14 @@
                        #reset-cells = <1>;
                };
 
+               bsc_intr: interrupt-controller@7ef00040 {
+                       compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
+                       reg = <0x7ef00040 0x30>;
+                       interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+               };
+
                hdmi0: hdmi@7ef00700 {
                        compatible = "brcm,bcm2711-hdmi0";
                        reg = <0x7ef00700 0x300>,
@@ -341,6 +349,8 @@
                        reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
                        reg-names = "bsc", "auto-i2c";
                        clock-frequency = <97500>;
+                       interrupt-parent = <&bsc_intr>;
+                       interrupts = <0>;
                        status = "disabled";
                };
 
@@ -377,6 +387,8 @@
                        reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
                        reg-names = "bsc", "auto-i2c";
                        clock-frequency = <97500>;
+                       interrupt-parent = <&bsc_intr>;
+                       interrupts = <1>;
                        status = "disabled";
                };
        };