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net/mlx5: Enable SW-defined RoCEv2 UDP source port
authorMark Zhang <markz@mellanox.com>
Tue, 14 Jan 2020 03:06:25 +0000 (05:06 +0200)
committerLeon Romanovsky <leonro@mellanox.com>
Sun, 19 Apr 2020 12:57:53 +0000 (15:57 +0300)
When this is enabled, UDP source port for RoCEv2 packets are defined
by software instead of firmware.

Signed-off-by: Mark Zhang <markz@mellanox.com>
Reviewed-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/main.c
include/linux/mlx5/mlx5_ifc.h

index a000cd8..0044aa5 100644 (file)
@@ -556,6 +556,31 @@ static int handle_hca_cap(struct mlx5_core_dev *dev, void *set_ctx)
        return set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE);
 }
 
+static int handle_hca_cap_roce(struct mlx5_core_dev *dev, void *set_ctx)
+{
+       void *set_hca_cap;
+       int err;
+
+       if (!MLX5_CAP_GEN(dev, roce))
+               return 0;
+
+       err = mlx5_core_get_caps(dev, MLX5_CAP_ROCE);
+       if (err)
+               return err;
+
+       if (MLX5_CAP_ROCE(dev, sw_r_roce_src_udp_port) ||
+           !MLX5_CAP_ROCE_MAX(dev, sw_r_roce_src_udp_port))
+               return 0;
+
+       set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability);
+       memcpy(set_hca_cap, dev->caps.hca_cur[MLX5_CAP_ROCE],
+              MLX5_ST_SZ_BYTES(roce_cap));
+       MLX5_SET(roce_cap, set_hca_cap, sw_r_roce_src_udp_port, 1);
+
+       err = set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_ROCE);
+       return err;
+}
+
 static int set_hca_cap(struct mlx5_core_dev *dev)
 {
        int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in);
@@ -586,6 +611,13 @@ static int set_hca_cap(struct mlx5_core_dev *dev)
                goto out;
        }
 
+       memset(set_ctx, 0, set_sz);
+       err = handle_hca_cap_roce(dev, set_ctx);
+       if (err) {
+               mlx5_core_err(dev, "handle_hca_cap_roce failed\n");
+               goto out;
+       }
+
 out:
        kfree(set_ctx);
        return err;
index 69b27c7..6fa2491 100644 (file)
@@ -74,6 +74,7 @@ enum {
        MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE        = 0x0,
        MLX5_SET_HCA_CAP_OP_MOD_ODP                   = 0x2,
        MLX5_SET_HCA_CAP_OP_MOD_ATOMIC                = 0x3,
+       MLX5_SET_HCA_CAP_OP_MOD_ROCE                  = 0x4,
 };
 
 enum {
@@ -903,7 +904,9 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
 
 struct mlx5_ifc_roce_cap_bits {
        u8         roce_apm[0x1];
-       u8         reserved_at_1[0x1f];
+       u8         reserved_at_1[0x3];
+       u8         sw_r_roce_src_udp_port[0x1];
+       u8         reserved_at_5[0x1b];
 
        u8         reserved_at_20[0x60];