dmaengine: idxd: Update calculation of group offset to be more readable

Create helper macros to make group offset calculation more readable.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/160407294683.839093.10740868559754142070.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c
index 2f09eb8..d6f551d 100644 (file)
--- a/drivers/dma/idxd/device.c
+++ b/drivers/dma/idxd/device.c
@@ -543,24 +543,22 @@ static void idxd_group_config_write(struct idxd_group *group)
        dev_dbg(dev, "Writing group %d cfg registers\n", group->id);
 
        /* setup GRPWQCFG */
-       for (i = 0; i < 4; i++) {
-               grpcfg_offset = idxd->grpcfg_offset +
-                       group->id * 64 + i * sizeof(u64);
-               iowrite64(group->grpcfg.wqs[i],
-                         idxd->reg_base + grpcfg_offset);
+       for (i = 0; i < GRPWQCFG_STRIDES; i++) {
+               grpcfg_offset = GRPWQCFG_OFFSET(idxd, group->id, i);
+               iowrite64(group->grpcfg.wqs[i], idxd->reg_base + grpcfg_offset);
                dev_dbg(dev, "GRPCFG wq[%d:%d: %#x]: %#llx\n",
                        group->id, i, grpcfg_offset,
                        ioread64(idxd->reg_base + grpcfg_offset));
        }
 
        /* setup GRPENGCFG */
-       grpcfg_offset = idxd->grpcfg_offset + group->id * 64 + 32;
+       grpcfg_offset = GRPENGCFG_OFFSET(idxd, group->id);
        iowrite64(group->grpcfg.engines, idxd->reg_base + grpcfg_offset);
        dev_dbg(dev, "GRPCFG engs[%d: %#x]: %#llx\n", group->id,
                grpcfg_offset, ioread64(idxd->reg_base + grpcfg_offset));
 
        /* setup GRPFLAGS */
-       grpcfg_offset = idxd->grpcfg_offset + group->id * 64 + 40;
+       grpcfg_offset = GRPFLGCFG_OFFSET(idxd, group->id);
        iowrite32(group->grpcfg.flags.bits, idxd->reg_base + grpcfg_offset);
        dev_dbg(dev, "GRPFLAGS flags[%d: %#x]: %#x\n",
                group->id, grpcfg_offset,

diff --git a/drivers/dma/idxd/registers.h b/drivers/dma/idxd/registers.h
index 1041c27..6f2f736 100644 (file)
--- a/drivers/dma/idxd/registers.h
+++ b/drivers/dma/idxd/registers.h
@@ -356,4 +356,22 @@ union wqcfg {
 
 #define WQCFG_STRIDES(_idxd_dev) ((_idxd_dev)->wqcfg_size / sizeof(u32))
 
+#define GRPCFG_SIZE            64
+#define GRPWQCFG_STRIDES       4
+
+/*
+ * This macro calculates the offset into the GRPCFG register
+ * idxd - struct idxd *
+ * n - wq id
+ * ofs - the index of the 32b dword for the config register
+ *
+ * The WQCFG register block is divided into groups per each wq. The n index
+ * allows us to move to the register group that's for that particular wq.
+ * Each register is 32bits. The ofs gives us the number of register to access.
+ */
+#define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\
+                                          (n) * GRPCFG_SIZE + sizeof(u64) * (ofs))
+#define GRPENGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 32)
+#define GRPFLGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 40)
+
 #endif