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arm64: dts: h3ulcb: Fix EthernetAVB PHY timing
authorVladimir Barinov <vladimir.barinov@cogentembedded.com>
Wed, 1 Feb 2017 08:42:02 +0000 (09:42 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 6 Mar 2017 08:54:26 +0000 (09:54 +0100)
Set PHY rxc-skew-ps to 1500 and all other values to their default values.

This is intended to to address failures in the case of 1Gbps communication
using the by h3ulcb board with the KSZ9031RNX phy.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts

index 9811534..69c623f 100644 (file)
        status = "okay";
 
        phy0: ethernet-phy@0 {
-               rxc-skew-ps = <900>;
-               rxdv-skew-ps = <0>;
-               rxd0-skew-ps = <0>;
-               rxd1-skew-ps = <0>;
-               rxd2-skew-ps = <0>;
-               rxd3-skew-ps = <0>;
-               txc-skew-ps = <900>;
-               txen-skew-ps = <0>;
-               txd0-skew-ps = <0>;
-               txd1-skew-ps = <0>;
-               txd2-skew-ps = <0>;
-               txd3-skew-ps = <0>;
+               rxc-skew-ps = <1500>;
                reg = <0>;
                interrupt-parent = <&gpio2>;
                interrupts = <11 IRQ_TYPE_LEVEL_LOW>;