Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: Remove redundant non-NUMA topology functions
  x86: early_printk: Protect against using the same device twice
  x86: Reduce verbosity of "PAT enabled" kernel message
  x86: Reduce verbosity of "TSC is reliable" message
  x86: mce: Use safer ways to access MCE registers
  x86: mce, inject: Use real inject-msg in raise_local
  x86: mce: Fix thermal throttling message storm
  x86: mce: Clean up thermal throttling state tracking code
  x86: split NX setup into separate file to limit unstack-protected code
  xen: check EFER for NX before setting up GDT mapping
  x86: Cleanup linker script using new linker script macros.
  x86: Use section .data.page_aligned for the idt_table.
  x86: convert to use __HEAD and HEAD_TEXT macros.
  x86: convert compressed loader to use __HEAD and HEAD_TEXT macros.
  x86: fix fragile computation of vsyscall address

diff --combined arch/x86/kernel/head_32.S
index 218aad7,0ad4302..050c278
--- 1/arch/x86/kernel/head_32.S
--- 2/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@@ -79,7 -79,7 +79,7 @@@ RESERVE_BRK(pagetables, INIT_MAP_SIZE
   * any particular GDT layout, because we load our own as soon as we
   * can.
   */
- .section .text.head,"ax",@progbits
+ __HEAD
  ENTRY(startup_32)
        /* test KEEP_SEGMENTS flag to see if the bootloader is asking
                us to not reload segments */
@@@ -608,7 -608,7 +608,7 @@@ ENTRY(initial_code
  /*
   * BSS section
   */
 -.section ".bss.page_aligned","wa"
 +__PAGE_ALIGNED_BSS
        .align PAGE_SIZE_asm
  #ifdef CONFIG_X86_PAE
  swapper_pg_pmd:
@@@ -626,7 -626,7 +626,7 @@@ ENTRY(empty_zero_page
   * This starts the data section.
   */
  #ifdef CONFIG_X86_PAE
 -.section ".data.page_aligned","wa"
 +__PAGE_ALIGNED_DATA
        /* Page-aligned for the benefit of paravirt? */
        .align PAGE_SIZE_asm
  ENTRY(swapper_pg_dir)

diff --combined arch/x86/kernel/head_64.S
index d0bc0a1,2640660..780cd92
--- 1/arch/x86/kernel/head_64.S
--- 2/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@@ -40,7 -40,7 +40,7 @@@ L4_START_KERNEL = pgd_index(__START_KER
  L3_START_KERNEL = pud_index(__START_KERNEL_map)
  
        .text
-       .section .text.head
+       __HEAD
        .code64
        .globl startup_64
  startup_64:
@@@ -418,7 -418,7 +418,7 @@@ ENTRY(phys_base
  ENTRY(idt_table)
        .skip IDT_ENTRIES * 16
  
 -      .section .bss.page_aligned, "aw", @nobits
 +      __PAGE_ALIGNED_BSS
        .align PAGE_SIZE
  ENTRY(empty_zero_page)
        .skip PAGE_SIZE

diff --combined arch/x86/kernel/traps.c
index a665c71,8351175..7e37dce
--- 1/arch/x86/kernel/traps.c
--- 2/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@@ -14,6 -14,7 +14,6 @@@
  #include <linux/spinlock.h>
  #include <linux/kprobes.h>
  #include <linux/uaccess.h>
 -#include <linux/utsname.h>
  #include <linux/kdebug.h>
  #include <linux/kernel.h>
  #include <linux/module.h>
@@@ -72,11 -73,9 +72,9 @@@ char ignore_fpu_irq
  
  /*
   * The IDT has to be page-aligned to simplify the Pentium
-  * F0 0F bug workaround.. We have a special link segment
-  * for this.
+  * F0 0F bug workaround.
   */
- gate_desc idt_table[NR_VECTORS]
-       __attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, };
+ gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
  #endif
  
  DECLARE_BITMAP(used_vectors, NR_VECTORS);