be illegal, even if the requested vector type is legal. Testcase is one of the
disabled ARM tests in the vector-select patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137562
91177308-0d34-0410-b5e6-
96231b3b80d8
assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
"APInt size does not match type size!");
+ // In some cases the vector type is legal but the element type is illegal.
+ // In this case, promote the inserted value. The type does not need to match
+ // the vector element type. Any extra bits introduced will be
+ // truncated away.
+ if (VT.isVector())
+ EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
+
unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);