AMDGPU/GlobalISel: Remove unnecesssary REQUIREs

This has been a mandatory part of the build for a while.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361956 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll b/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
index 8f83fea..05cbd6f 100644 (file)
--- a/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
+++ b/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -march=amdgcn -mcpu=fiji -O0 -stop-after=irtranslator -global-isel %s -o - 2>&1 | FileCheck %s
-; REQUIRES: global-isel
-; This file checks that the translation from llvm IR to generic MachineInstr
-; is correct.
+
+; This file checks that the translation from llvm IR to generic
+; MachineInstr is correct.
 
 ; Tests for add.
 ; CHECK: name: addi32

diff --git a/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir b/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
index 217e576..c19c279 100644 (file)
--- a/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
+++ b/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
@@ -1,8 +1,6 @@
 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN
 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN
 
-# REQUIRES: global-isel
-
 --- |
   define amdgpu_kernel void @global_addrspace(i32 addrspace(1)* %global0) { ret void }
 ...

diff --git a/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir b/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
index ba50b59..53c2afa 100644 (file)
--- a/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
+++ b/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
@@ -2,8 +2,6 @@
 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN,CI,SICI
 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN,VI,SIVI
 
-# REQUIRES: global-isel
-
 --- |
   define amdgpu_kernel void @smrd_imm(i32 addrspace(4)* %const0) { ret void }
 ...

diff --git a/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir b/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
index ba38b5b..eb8e39c 100644 (file)
--- a/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
+++ b/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
@@ -1,8 +1,6 @@
 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN
 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN
 
-# REQUIRES: global-isel
-
 --- |
   define amdgpu_kernel void @global_addrspace(i32 addrspace(1)* %global0,
                                               i64 addrspace(1)* %global1,

diff --git a/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll b/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
index 5756ff5..72f27e6 100644 (file)
--- a/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
+++ b/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
@@ -1,5 +1,4 @@
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; REQUIRES: global-isel
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -O0 -amdgpu-ir-lower-kernel-arguments=0 -stop-after=irtranslator -global-isel %s -o - | FileCheck -check-prefix=HSA-VI %s
 
 define amdgpu_kernel void @i8_arg(i32 addrspace(1)* nocapture %out, i8 %in) nounwind {

diff --git a/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir b/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir
index 55e617e..32839ff 100644 (file)
--- a/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir
+++ b/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir
@@ -2,8 +2,6 @@
 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
 
-# REQUIRES: global-isel
-
 --- |
   define void @exp_s() {
     call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 1.0, float 1.0, float 1.0, float 1.0, i1 0, i1 0)

diff --git a/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir b/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
index 70c5419..b749959 100644 (file)
--- a/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
+++ b/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
@@ -1,7 +1,5 @@
 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=regbankselect %s -verify-machineinstrs -o - | FileCheck %s
 
-# REQUIRES: global-isel
-
 --- |
   define amdgpu_kernel void @load_constant(i32 addrspace(4)* %ptr0) { ret void }
   define amdgpu_kernel void @load_global_uniform(i32 addrspace(1)* %ptr1) {

diff --git a/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll b/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
index a1bf987..23ab633 100644 (file)
--- a/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
+++ b/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
@@ -1,7 +1,5 @@
 ; RUN: llc < %s -march=amdgcn -mcpu=tonga -show-mc-encoding -verify-machineinstrs -global-isel | FileCheck --check-prefix=GCN %s
 
-; REQUIRES: global-isel
-
 ; GCN-LABEL: vs_epilog
 ; GCN: s_endpgm
 

diff --git a/test/CodeGen/AMDGPU/GlobalISel/smrd.ll b/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
index ff33a6e..da386d2 100644 (file)
--- a/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
+++ b/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
@@ -3,8 +3,6 @@
 ; RUN: llc < %s -march=amdgcn -mcpu=bonaire -show-mc-encoding -verify-machineinstrs -global-isel | FileCheck --check-prefix=CI --check-prefix=GCN %s
 ; RUN: llc < %s -march=amdgcn -mcpu=tonga -show-mc-encoding -verify-machineinstrs -global-isel | FileCheck --check-prefix=VI --check-prefix=GCN --check-prefix=SIVI %s
 
-; REQUIRES: global-isel
-
 ; SMRD load with an immediate offset.
 ; GCN-LABEL: {{^}}smrd0:
 ; SICI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x1 ; encoding: [0x01