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ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for i2c nodes
authorSimon Horman <horms+renesas@verge.net.au>
Tue, 13 Dec 2016 11:45:53 +0000 (12:45 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 3 Jan 2017 09:46:48 +0000 (10:46 +0100)
Use recently added R-Car Gen 2 fallback binding for i2c nodes in
DT for r8a7794 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7794 and the
fallback binding for R-Car Gen 2.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm/boot/dts/r8a7794.dtsi

index 9692bfd..89f8f98 100644 (file)
 
        /* The memory map in the User's Manual maps the cores to bus numbers */
        i2c0: i2c@e6508000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6508000 0 0x40>;
                interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
        };
 
        i2c1: i2c@e6518000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6518000 0 0x40>;
                interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
        };
 
        i2c2: i2c@e6530000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6530000 0 0x40>;
                interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
        };
 
        i2c3: i2c@e6540000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6540000 0 0x40>;
                interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
        };
 
        i2c4: i2c@e6520000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6520000 0 0x40>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
        };
 
        i2c5: i2c@e6528000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6528000 0 0x40>;
                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C5>;