namespace llvm {
-/// TargetRegisterDesc - This record contains all of the information known about
+/// MCRegisterDesc - This record contains all of the information known about
/// a particular register. The Overlaps field contains a pointer to a zero
/// terminated array of registers that this register aliases, starting with
/// itself. This is needed for architectures like X86 which have AL alias AX
};
/// MCRegisterInfo base class - We assume that the target defines a static
-/// array of TargetRegisterDesc objects that represent all of the machine
+/// array of MCRegisterDesc objects that represent all of the machine
/// registers that the target has. As such, we simply have to track a pointer
/// to this array so that we can turn register number into a register
/// descriptor.
bool isAllocatable() const { return Allocatable; }
};
-/// TargetRegisterDesc - It's just an alias of MCRegisterDesc.
-typedef MCRegisterDesc TargetRegisterDesc;
-
/// TargetRegisterInfoDesc - Extra information, not in MCRegisterDesc, about
/// registers. These are used by codegen, not by MC.
struct TargetRegisterInfoDesc {
OS << "struct " << ClassName << " : public TargetRegisterInfo {\n"
<< " explicit " << ClassName
- << "(const TargetRegisterDesc *D, const TargetRegisterInfoDesc *ID, "
+ << "(const MCRegisterDesc *D, const TargetRegisterInfoDesc *ID, "
<< "int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
<< " virtual int getDwarfRegNumFull(unsigned RegNum, "
<< "unsigned Flavour) const;\n"
// Emit the constructor of the class...
OS << ClassName << "::" << ClassName
- << "(const TargetRegisterDesc *D, const TargetRegisterInfoDesc *ID, "
+ << "(const MCRegisterDesc *D, const TargetRegisterInfoDesc *ID, "
<< "int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
<< " : TargetRegisterInfo(ID"
<< ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n"