Allow CONCAT_VECTORS nodes to be legal or have custom lowering for some targets.

Changes to take advantage of this will come later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70560 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 9d66609..697caa6 100644 (file)
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -1750,23 +1750,46 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
     break;
 
   case ISD::CONCAT_VECTORS: {
-    // Use extract/insert/build vector for now. We might try to be
-    // more clever later.
-    MVT PtrVT = TLI.getPointerTy();
+    // Legalize the operands.
     SmallVector<SDValue, 8> Ops;
-    unsigned NumOperands = Node->getNumOperands();
-    for (unsigned i=0; i < NumOperands; ++i) {
-      SDValue SubOp = Node->getOperand(i);
-      MVT VVT = SubOp.getNode()->getValueType(0);
-      MVT EltVT = VVT.getVectorElementType();
-      unsigned NumSubElem = VVT.getVectorNumElements();
-      for (unsigned j=0; j < NumSubElem; ++j) {
-        Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, SubOp,
-                                  DAG.getConstant(j, PtrVT)));
+    for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i)
+      Ops.push_back(LegalizeOp(Node->getOperand(i)));
+    Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
+
+    switch (TLI.getOperationAction(ISD::CONCAT_VECTORS,
+                                   Node->getValueType(0))) {
+    default: assert(0 && "Unknown operation action!");
+    case TargetLowering::Legal:
+      break;
+    case TargetLowering::Custom:
+      Tmp3 = TLI.LowerOperation(Result, DAG);
+      if (Tmp3.getNode()) {
+        Result = Tmp3;
+        break;
+      }
+      // FALLTHROUGH
+    case TargetLowering::Expand: {
+      // Use extract/insert/build vector for now. We might try to be
+      // more clever later.
+      MVT PtrVT = TLI.getPointerTy();
+      SmallVector<SDValue, 8> Ops;
+      unsigned NumOperands = Node->getNumOperands();
+      for (unsigned i=0; i < NumOperands; ++i) {
+        SDValue SubOp = Node->getOperand(i);
+        MVT VVT = SubOp.getNode()->getValueType(0);
+        MVT EltVT = VVT.getVectorElementType();
+        unsigned NumSubElem = VVT.getVectorNumElements();
+        for (unsigned j=0; j < NumSubElem; ++j) {
+          Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, SubOp,
+                                    DAG.getConstant(j, PtrVT)));
+        }
       }
+      return LegalizeOp(DAG.getNode(ISD::BUILD_VECTOR, dl,
+                                    Node->getValueType(0),
+                                    &Ops[0], Ops.size()));
     }
-    return LegalizeOp(DAG.getNode(ISD::BUILD_VECTOR, dl, Node->getValueType(0),
-                      &Ops[0], Ops.size()));
+    }
+    break;
   }
 
   case ISD::CALLSEQ_START: {

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 6974dde..0e5e0c0 100644 (file)
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -443,6 +443,7 @@ TargetLowering::TargetLowering(TargetMachine &tm)
     
     // These operations default to expand.
     setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
+    setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
   }
 
   // Most targets ignore the @llvm.prefetch intrinsic.