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ARM: l2c: add decode for L2C-220 cache ways
author
Russell King
<rmk+kernel@arm.linux.org.uk>
Sat, 15 Mar 2014 23:07:07 +0000
(23:07 +0000)
committer
Russell King
<rmk+kernel@arm.linux.org.uk>
Thu, 29 May 2014 23:48:33 +0000
(
00:48
+0100)
Rather than assuming these are always 8-way, it can be decoded from the
auxillary register in the same manner as L2C-210.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mm/cache-l2x0.c
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diff --git
a/arch/arm/mm/cache-l2x0.c
b/arch/arm/mm/cache-l2x0.c
index
b4dd2f4
..
69a1831
100644
(file)
--- a/
arch/arm/mm/cache-l2x0.c
+++ b/
arch/arm/mm/cache-l2x0.c
@@
-701,6
+701,7
@@
static void __init __l2c_init(const struct l2c_init_data *data,
break;
case L2X0_CACHE_ID_PART_L210:
+ case L2X0_CACHE_ID_PART_L220:
ways = (aux >> 13) & 0xf;
break;