break;
}
+ // We can always fold X == X for integer setcc's.
+ if (N1 == N2 && OpVT.isInteger())
+ return getBoolConstant(ISD::isTrueWhenEqual(Cond), dl, VT, OpVT);
+
if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2)) {
const APInt &C2 = N2C->getAPIntValue();
if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
if (N0 == N1) {
// The sext(setcc()) => setcc() optimization relies on the appropriate
// constant being emitted.
+ assert(!N0.getValueType().isInteger() &&
+ "Integer types should be handled by FoldSetCC");
bool EqTrue = ISD::isTrueWhenEqual(Cond);
-
- // We can always fold X == X for integer setcc's.
- if (N0.getValueType().isInteger())
- return DAG.getBoolConstant(EqTrue, dl, VT, OpVT);
-
unsigned UOF = ISD::getUnorderedFlavor(Cond);
if (UOF == 2) // FP operators that are undefined on NaNs.
return DAG.getBoolConstant(EqTrue, dl, VT, OpVT);
define <2 x i32> @icmp_constfold_v2i32(<2 x i32> %a) {
; CHECK-LABEL: icmp_constfold_v2i32:
; CHECK: ; %bb.0:
-; CHECK-NEXT: movi.2d v[[CMP:[0-9]+]], #0xffffffffffffffff
-; CHECK-NEXT: ; %bb.1:
; CHECK-NEXT: movi.2s [[MASK:v[0-9]+]], #1
-; CHECK-NEXT: and.8b v0, v[[CMP]], [[MASK]]
+; CHECK-NEXT: and.8b v0, [[MASK]], [[MASK]]
; CHECK-NEXT: ret
%1 = icmp eq <2 x i32> %a, %a
br label %bb2
define <4 x i32> @icmp_constfold_v4i32(<4 x i32> %a) {
; CHECK-LABEL: icmp_constfold_v4i32:
; CHECK: ; %bb.0:
-; CHECK-NEXT: movi.2d v[[CMP:[0-9]+]], #0xffffffffffffffff
-; CHECK-NEXT: ; %bb.1:
; CHECK-NEXT: movi.4h [[MASK:v[0-9]+]], #1
-; CHECK-NEXT: and.8b [[ZEXT:v[0-9]+]], v[[CMP]], [[MASK]]
+; CHECK-NEXT: ; %bb.1:
+; CHECK-NEXT: and.8b [[ZEXT:v[0-9]+]], [[MASK]], [[MASK]]
; CHECK-NEXT: ushll.4s v0, [[ZEXT]], #0
; CHECK-NEXT: ret
%1 = icmp eq <4 x i32> %a, %a
define <16 x i8> @icmp_constfold_v16i8(<16 x i8> %a) {
; CHECK-LABEL: icmp_constfold_v16i8:
; CHECK: ; %bb.0:
-; CHECK-NEXT: movi.2d [[CMP:v[0-9]+]], #0xffffffffffffffff
-; CHECK-NEXT: ; %bb.1:
; CHECK-NEXT: movi.16b [[MASK:v[0-9]+]], #1
-; CHECK-NEXT: and.16b v0, [[CMP]], [[MASK]]
+; CHECK-NEXT: and.16b v0, [[MASK]], [[MASK]]
; CHECK-NEXT: ret
%1 = icmp eq <16 x i8> %a, %a
br label %bb2
%32 = fsub float %30, %31 ; <float> [#uses=1]
%33 = fsub float %10, %32 ; <float> [#uses=1]
store float %33, float* undef, align 4
- %34 = icmp slt i32 undef, undef ; <i1> [#uses=1]
+ %34 = icmp slt i32 %tmp54, %tmp80 ; <i1> [#uses=1]
br i1 %34, label %bb8, label %bb9
bb9: ; preds = %bb8
define <2 x i16> @compare_v2i64_to_v2i16_unary(<2 x i16>* %src) nounwind {
; X86-LABEL: compare_v2i64_to_v2i16_unary:
; X86: # %bb.0:
-; X86-NEXT: pcmpeqd %xmm0, %xmm0
+; X86-NEXT: movaps {{.*#+}} xmm0 = [65535,0,65535,0]
; X86-NEXT: retl
;
; X64-LABEL: compare_v2i64_to_v2i16_unary:
; X64: # %bb.0:
-; X64-NEXT: pcmpeqd %xmm0, %xmm0
+; X64-NEXT: movaps {{.*#+}} xmm0 = [65535,65535]
; X64-NEXT: retq
%val = load <2 x i16>, <2 x i16>* %src, align 4
%cmp = icmp uge <2 x i16> %val, %val