more bg pattern integration..

diff --git a/de1_nes/dummy-mos6502.vhd b/de1_nes/dummy-mos6502.vhd
index 2cb1756..f3debe0 100644 (file)
--- a/de1_nes/dummy-mos6502.vhd
+++ b/de1_nes/dummy-mos6502.vhd
@@ -213,7 +213,7 @@ end;
                             --set vram addr 2005 (first row, 6th col)\r
                             io_out(16#2006#, 16#20#);\r
                         elsif (nt_step_cnt = 1 * cpu_io_multi) then\r
-                            io_out(16#2006#, 16#3b#);\r
+                            io_out(16#2006#, 16#03#);\r
                         elsif (nt_step_cnt = 2 * cpu_io_multi) then\r
                             --set name tbl data\r
                             --0x44, 45, 45 = DEE\r
@@ -256,7 +256,7 @@ end;
 \r
                         else\r
                             io_brk;\r
-                            if (nt_step_cnt > 5 * cpu_io_multi) then\r
+                            if (nt_step_cnt > 4 * cpu_io_multi) then\r
                                 global_step_cnt := global_step_cnt + 1;\r
                             end if;\r
                         end if;\r
@@ -374,10 +374,10 @@ end;
                         --step4 = scroll test.\r
                         if (scl_step_cnt = 0) then\r
                             --x scroll pos=123\r
-                            io_out(16#2005#, 123);\r
+                            io_out(16#2005#, 0);\r
                         elsif (scl_step_cnt = 1 * cpu_io_multi) then\r
                             --y scroll pos=100\r
-                            io_out(16#2005#, 100);\r
+                            io_out(16#2005#, 0);\r
 \r
                         else\r
                             io_brk;\r

diff --git a/de1_nes/ppu/vga_ppu.vhd b/de1_nes/ppu/vga_ppu.vhd
index 92ff7ca..7e4fde0 100644 (file)
--- a/de1_nes/ppu/vga_ppu.vhd
+++ b/de1_nes/ppu/vga_ppu.vhd
@@ -1039,38 +1039,6 @@ begin
                     d_print("nes_x: " & conv_hex16(conv_integer(nes_x)));\r
                     d_print("nes_y: " & conv_hex16(conv_integer(nes_y)));\r
 \r
---                    ----fetch next tile byte.\r
---                    if (prf_x (2 downto 0) = "001") then\r
---                        --vram addr is incremented every 8 cycle.\r
---                        --name table at 0x2000\r
---                        vram_addr(9 downto 0) \r
---                            <= prf_y(dsize - 1 downto 3) \r
---                                & prf_x(dsize - 1 downto 3);\r
---                        vram_addr(asize - 1 downto 10) <= "10" & ppu_ctrl(PPUBNA downto 0) \r
---                                                        + ("000" & prf_x(dsize));\r
---                    ----fetch attr table byte.\r
---                    elsif (prf_x (4 downto 0) = "00011") then\r
---                        --attribute table is loaded every 32 cycle.\r
---                        --attr table at 0x23c0\r
---                        vram_addr(dsize - 1 downto 0) <= "11000000" +\r
---                                ("00" & prf_y(7 downto 5) & prf_x(7 downto 5));\r
---                        vram_addr(asize - 1 downto dsize) <= "10" &\r
---                                ppu_ctrl(PPUBNA downto 0) & "11"\r
---                                    + ("000" & prf_x(dsize) & "00");\r
---                    ----fetch pattern table low byte.\r
---                    elsif (prf_x (2 downto 0) = "101") then\r
---                         --vram addr is incremented every 8 cycle.\r
---                         vram_addr <= "0" & ppu_ctrl(PPUBPA) & \r
---                                              disp_nt(dsize - 1 downto 0) \r
---                                                    & "0"  & prf_y(2  downto 0);\r
---                    ----fetch pattern table high byte.\r
---                    elsif (prf_x (2 downto 0) = "111") then\r
---                         --vram addr is incremented every 8 cycle.\r
---                         vram_addr <= "0" & ppu_ctrl(PPUBPA) & \r
---                                              disp_nt(dsize - 1 downto 0) \r
---                                                    & "0"  & prf_y(2 downto 0) + "00000000001000";\r
---                    end if;\r
-\r
                     ----fetch next tile byte.\r
                     if (prf_x (2 downto 0) = "010") then\r
                         nt_we_n <= '0';\r
@@ -1133,13 +1101,57 @@ begin
         else\r
             if (rising_edge(emu_ppu_clk)) then\r
                 --fetch sprite and display.\r
-                if (ppu_mask(PPUSSP) = '1' and\r
-                        (nes_y < conv_std_logic_vector(VSCAN, X_SIZE) or \r
-                        nes_y = conv_std_logic_vector(VSCAN_NEXT_START, X_SIZE))) then\r
 \r
+                if (nes_y < conv_std_logic_vector(VSCAN, X_SIZE) or \r
+                     nes_y = conv_std_logic_vector(VSCAN_NEXT_START, X_SIZE)) then\r
+\r
+                    --------------------------\r
+                    --bg pattern fetch.\r
+                    --------------------------\r
+                    if (ppu_mask(PPUSBG) = '1' and (\r
+                        (nes_x > conv_std_logic_vector(1, X_SIZE) and \r
+                         nes_x <= conv_std_logic_vector(HSCAN, X_SIZE))\r
+                         or\r
+                        (nes_x >= conv_std_logic_vector(HSCAN_NEXT_START, X_SIZE))\r
+                        )) then\r
+\r
+                        ----fetch next tile byte.\r
+                        if (prf_x (2 downto 0) = "001") then\r
+                            --vram addr is incremented every 8 cycle.\r
+                            --name table at 0x2000\r
+                            vram_addr(9 downto 0) \r
+                                <= prf_y(dsize - 1 downto 3) \r
+                                    & prf_x(dsize - 1 downto 3);\r
+                            vram_addr(asize - 1 downto 10) <= "10" & ppu_ctrl(PPUBNA downto 0) \r
+                                                            + ("000" & prf_x(dsize));\r
+                        ----fetch attr table byte.\r
+                        elsif (prf_x (4 downto 0) = "00011") then\r
+                            --attribute table is loaded every 32 cycle.\r
+                            --attr table at 0x23c0\r
+                            vram_addr(dsize - 1 downto 0) <= "11000000" +\r
+                                    ("00" & prf_y(7 downto 5) & prf_x(7 downto 5));\r
+                            vram_addr(asize - 1 downto dsize) <= "10" &\r
+                                    ppu_ctrl(PPUBNA downto 0) & "11"\r
+                                        + ("000" & prf_x(dsize) & "00");\r
+                        ----fetch pattern table low byte.\r
+                        elsif (prf_x (2 downto 0) = "101") then\r
+                             --vram addr is incremented every 8 cycle.\r
+                             vram_addr <= "0" & ppu_ctrl(PPUBPA) & \r
+                                                  disp_nt(dsize - 1 downto 0) \r
+                                                        & "0"  & prf_y(2  downto 0);\r
+                        ----fetch pattern table high byte.\r
+                        elsif (prf_x (2 downto 0) = "111") then\r
+                             --vram addr is incremented every 8 cycle.\r
+                             vram_addr <= "0" & ppu_ctrl(PPUBPA) & \r
+                                                  disp_nt(dsize - 1 downto 0) \r
+                                                        & "0"  & prf_y(2 downto 0) + "00000000001000";\r
+                        end if;\r
+\r
+                    --------------------------\r
                     --sprite pattern fetch.\r
-                    if (nes_x > conv_std_logic_vector(HSCAN, X_SIZE) and \r
-                        nes_x <= conv_std_logic_vector(HSCAN_SPR_MAX, X_SIZE)) then\r
+                    --------------------------\r
+                    elsif (ppu_mask(PPUSSP) = '1' and (nes_x > conv_std_logic_vector(HSCAN, X_SIZE) and \r
+                        nes_x <= conv_std_logic_vector(HSCAN_SPR_MAX, X_SIZE))) then\r
                         \r
                         ----fetch pattern table low byte.\r
                         if (nes_x (2 downto 0) = "101" ) then\r
@@ -1177,8 +1189,7 @@ begin
 \r
                 else\r
                     vram_addr <= (others => 'Z');\r
-                end if; --if (ppu_mask(PPUSSP) = '1') \r
-                        --(nes_y < conv_std_logic_vector(VSCAN, X_SIZE) or \r
+                end if; --(nes_y < conv_std_logic_vector(VSCAN, X_SIZE) or \r
                         --nes_y = conv_std_logic_vector(VSCAN_NEXT_START, X_SIZE))) then\r
             end if; --if (rising_edge(emu_ppu_clk)) then\r
         end if;--if (rst_n = '0') then\r